//************************************************************************************
//**  
//**  Source name:   C:\Users\david main\OneDrive\AAFLOWCODE\ghost_test bl0032.fcfx
//**  Title:         
//**  Description:   
//**  Device:        PIC16.33E.BL0032
//**  
//**  Generated by:  Flowcode v9.1.0.27
//**  Date:          Tuesday, April 13, 2021 10:43:43
//**  Users:         1
//**  Registered to: DAVIDJOINER (73824157)
//**  Licence key: V5TJBD
//**  
//**  
//**     NOT FOR COMMERCIAL USE
//**  
//**  https://www.flowcode.co.uk
//**  
//************************************************************************************


#define MX_PIC16

#define MX_CAL_PIC16

#define MX_CLK_SPEED 140000000

#define FCP_NULL Unconnected_Port


#include <xc.h>
#include <math.h>
#include <stdlib.h>
#include "p33Exxxx.h"

_FGS(GWRP_OFF & GSS_OFF & GSSK_OFF);
_FOSCSEL(FNOSC_PRIPLL & IESO_ON);
_FOSC(POSCMD_HS & OSCIOFNC_OFF & IOL1WAY_OFF & FCKSM_CSECME);
_FWDT(WDTPOST_PS1024 & WDTPRE_PR128 & PLLKEN_ON & WINDIS_OFF & FWDTEN_OFF);
_FPOR(FPWRT_PWR128 & BOREN_ON & ALTI2C1_ON);
_FICD(ICS_PGD1 & RSTPRI_PF & JTAGEN_OFF);
_FAS(AWRP_OFF & APL_OFF & APLK_OFF);
_FUID0(0xFF55);
;
//ICD functionality
#define USE_FLOWCODE_ICD2
#define ICD_CLK_PORT 1
#define ICD_DATA_PORT 1
#define ICD_CLK_PIN 6
#define ICD_DATA_PIN 7
#define ICD_NUM_BPS 8
signed int brk_pnt[ICD_NUM_BPS] = {-1, -1, -1, -1, -1, -1, -1, -1};
#define ICD_STACK_SIZE 8
unsigned char icd_stack[ICD_STACK_SIZE] = {0, 0, 0, 0, 0, 0, 0, 0};
#define ICD_ID0 0x6a
#define ICD_ID1 0x88
#define ICD_ID2 0x19
#define ICD_ID3 0x90
#define ICD_ID4 0x26
#define ICD_ID5 0x34
#define ICD_ID6 0x98
#define ICD_ID7 0x5d



/*========================================================================*\
   Use :Include the type definitions
\*========================================================================*/
#include "C:\ProgramData\MatrixTSL\FlowcodeV9\CAL\internals.c"





/*========================================================================*\
   Use :panel
       :Variable declarations
       :Macro function declarations
\*========================================================================*/
#define FCV_FALSE (0)
#define FCV_TRUE (1)


/*========================================================================*\
   Use :Include the chip adaption layer
\*========================================================================*/
#include "C:\ProgramData\MatrixTSL\FlowcodeV9\CAL\includes.c"


/*=----------------------------------------------------------------------=*\
   Use :Supplementary defines
\*=----------------------------------------------------------------------=*/
/*=----------------------------------------------------------------------=*\
   Use :Supplementary implementations
\*=----------------------------------------------------------------------=*/




/*========================================================================*\
   Use :Main
\*========================================================================*/
int main()
{
ANSELB = 0;
ANSELC = 0;
ANSELD = 0;
ANSELE = 0;
ANSELG = 0;
RPINR23bits.SS2R = 121;  //Map SS2 to Pin G9

//Setup configuration for 70MIPs using 8MHz Crystal
PLLFBD = 68;			// M=70
CLKDIVbits.PLLPOST = 0;		// N1=2
CLKDIVbits.PLLPRE = 0;		// N2=2
OSCTUN = 0;			//Tune FRC oscillator, if FRC is used

//Disable Watch Dog Timer
RCONbits.SWDTEN = 0;

// Clock switching to incorporate PLL
__builtin_write_OSCCONH(0x03);	// Initiate Clock Switch to Primary

// Oscillator with PLL (NOSC=0b011)
__builtin_write_OSCCONL(0x01);	// Start clock switching
while(OSCCONbits.COSC != 0b011);

// Wait for Clock switch to occur	
while(OSCCONbits.LOCK != 1);

//USB H/W initialization for 70 MIPs
ACLKCON3 = 0x24C1;
ACLKDIV3 = 0x7;

// Wait for PLL to lock
ACLKCON3bits.ENAPLL = 1;
while(ACLKCON3bits.APLLCK != 1);


	//Enable initial stop condition
	dbg_mode = 0x08;

	ICD_PUSH(0);


	FC_MARKER(1);

	FC_MARKER(7);

	// Name: Loop, Type: Loop: While 1
	while (1)
	{

		FC_MARKER(7);

		if ((1) == 0) break;
		FC_MARKER(3);

		// Name: Output, Type: Output: 0 -> PORTD
		SET_PORT(D,(0));

		FC_MARKER(4);

		// Name: Delay, Type: Delay: 500 ms
		FCI_DELAYINTWDT_MS(500);

		FC_MARKER(5);

		// Name: Output, Type: Output: 255 -> PORTD
		SET_PORT(D,(255));

		FC_MARKER(6);

		// Name: Delay, Type: Delay: 500 ms
		FCI_DELAYINTWDT_MS(500);

		FC_MARKER(2);


	}

	FC_MARKER(8);

	ICD_POP();

	//Code to signal end of program to ICD
	dbg_mode = 0x08;

	FC_MARKER(-1);


	mainendloop: goto mainendloop;
	return 0;
}



/*========================================================================*\
   Use :Interrupt
\*========================================================================*/