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PIC32MZ144 IRQ'S are not implemented
Posted: Sun Aug 02, 2026 3:05 pm
by obi100
The IRQ's of the PIC32MZ2048EFM144 are not configured correctly. Only one IOC can be created on Port B, even though the datasheet indicates that all ports have this option and at least seven ports are directly programmable. While the pins of the ports can be assigned in the processor, the high and low masking values remain at 0x00, preventing the IOC from working. Even manually creating the interrupts in C doesn't seem to compile correctly, as they still don't function. The compiler is a whole other story...
Re: PIC32MZ144 IRQ'S are not implemented
Posted: Mon Aug 17, 2026 5:09 pm
by obi100
Was ist los mit euch, kann jemand meinen POST lesen und sich kümmern. Ihr seid echt armselig!!!!!!!!!!!!!!!!!!!!!!!!!!!
Re: PIC32MZ144 IRQ'S are not implemented
Posted: Tue Aug 18, 2026 7:23 am
by WingNut
"What's wrong with you, someone can read my POST and take care of it. You are really poor!!!!!!!!!!!!!!!!!!!!!!!!!!!"
Maybe everyone is busy fighting wildfires, or on leave. Have patience.
and manners...
Re: PIC32MZ144 IRQ'S are not implemented
Posted: Tue Aug 18, 2026 10:30 am
by obi100
What an unnecessary comment! It's a fact that FlowCode 11 has terrible support. For 14 days, no one even reads what's written, and solutions usually have to be done by the user instead of finally delivering a working product. The software is "old school" and performs like it did in the 80s. If I have to pay for everything, I expect professional support, not comments from just anyone who can't contribute anything to solving the problem.
Re: PIC32MZ144 IRQ'S are not implemented
Posted: Tue Aug 18, 2026 3:14 pm
by BenR
Hello,
Sorry you haven't had an answer. I think Wingnut's comment is fairly justified. Please remember to follow our forum rules which is to be polite and courteous. Bumping a topic is fine but being rude is not. We are a small team and we rely on our community to help us with support. This usually works well but things can slip between the cracks at times. Certainly more so during the summer when staff are away on holiday.
There should be an IOC interrupt for each and every port. On the PIC32MZ devices it appears each port has it's own interrupt vector which is why not all ports are available under a single IOC interrupt.
You should have a list like this.
- Screenshot 2026-08-18 150806.png (9.48 KiB) Viewed 160 times
I've enabled the IOC for PortB pins 0 and 1 and the masks look ok. They go LowByte, High Byte from right to left so the 0x03 seen here is the low byte of PortB.
- Screenshot 2026-08-18 151233.png (4.97 KiB) Viewed 160 times
The generated code to enable the interrupt looks like this which again looks correct
Code: Select all
CNENB = 0x3 | (0x0 << 8);
CNCONBbits.ON = 1;
IEC3bits.CNBIE = 1;
IPC29bits.CNBIP = 2;
IPC29bits.CNBIS = 2;
INTCONbits.MVEC = 1;
__builtin_mtc0(12,0,(__builtin_mfc0(12,0) | 0x0001));
Here's the code for the interrupt handler.
Code: Select all
//Handler code for [IOCB]
#ifndef MX_ISR_CNB
#define MX_ISR_CNB
void __ISR(_CHANGE_NOTICE_B_VECTOR, ipl2AUTO) _IntHandlerChangeNotification_PortB(void)
{
PORTB;
IFS3bits.CNBIF = 0;
FCM_IOC_PortB();
}
#else
#warning "This interrupt has previously been enabled, so the macro <IOC_PortB> may never get called."
#endif
If any of this looks wrong then let me know and I can investigate further.
Have you checked the signals going to the IOC pins are correctly reaching VCC/VSS and have clean rising/falling edges.