|2_digit_counter
input_clock => clock_block:inst|inst1.CLK
clka => clka~1.LIT
annodes[0] <= ~GND~0
annodes[1] <= ~GND~1
segs[7] <= ~VCC~0
clkb <= clka~1
annodes[2] <= clock_block:inst|inst40
annodes[3] <= clock_block:inst|inst40~7
output_clock_test_pin <= clock_block:inst|inst48
segs[2] <= display_block:inst2|selector:inst4|arbitrator:inst2|inst1~142
segs[4] <= display_block:inst2|selector:inst4|arbitrator:inst4|inst1~84
segs[0] <= display_block:inst2|selector:inst4|arbitrator:inst|inst1~165
segs[5] <= display_block:inst2|selector:inst4|arbitrator:inst5|inst1~298
segs[6] <= display_block:inst2|selector:inst4|arbitrator:inst6|inst1~141
segs[1] <= display_block:inst2|selector:inst4|arbitrator:inst1|inst1~301
segs[3] <= display_block:inst2|selector:inst4|arbitrator:inst3|inst1~355

