[Device]
FlowcodeProduct=ARM
ChipName=AT91SAM7S128
DefaultPackageType=0
Pins=40
Ports=4
ADCPins=8
ADCBits=10
ConfigOverride=1
ClockOverrideValue=47923200
MaxClock=55000000
PrescalerBits=3
ClockDivider=1
TimerOverflow=256
ConfigAddress=0x0000
ConfigCount=1
PWMCount=2
EepromSize=0

[Pins]
Pin1 = "VDDOUT"
Pin2 = "GND"
Pin3 = "RESET"
Pin4 = "PORTA0/PA24"
Pin5 = "PORTA1/PA26"
Pin6 = "PORTA2/PA11/PWM0"
Pin7 = "PORTA3/PA10/DTXD"
Pin8 = "PORTA4/PA9/DRXD"
Pin9 = "PORTA5/PA8/ADTRG"
Pin10 = "PORTA6/PA6/TXD0"
Pin11 = "PORTA7/PA5/RXD0"
Pin12 = "PORTC3/PA7/PWM3"
Pin13 = "PORTD0/PA4/TWCK"
Pin14 = "PORTD1/PA27"
Pin15 = "PORTD2/PA28"
Pin16 = "PORTD3/PA29"
Pin17 = "PORTD4/PA3/TWD"
Pin18 = "PORTD5/PA2/PWM2"
Pin19 = "PORTD6/PA1/PWM1"
Pin20 = "PORTD7/PA0/PWM0"
Pin21 = "TST"
Pin22 = "PORTE3/AD4"
Pin23 = "PORTE0/AD5"
Pin24 = "PORTE1/AD6"
Pin25 = "PORTE2/AD7"
Pin26 = "GND"
Pin27 = "PORTC0/PA17/AD0"
Pin28 = "PORTC1/PA18/AD1"
Pin29 = "PORTC2/PA19/AD2"
Pin30 = "PORTC6/PA22"
Pin31 = "PORTC7/PA21"
Pin32 = "PORTB0/PA23"
Pin33 = "PORTB1/PA20/AD3"
Pin34 = "PORTB2/PA31"
Pin35 = "PORTB3/PA15"
Pin36 = "PORTB4/PA14/SPCK"
Pin37 = "PORTB5/PA13/MOSI"
Pin38 = "PORTB6/PA25"
Pin39 = "PORTB7/PA12/MISO"
Pin40 = "VDDIN"

[Ports]
PortPin4=0x0000
PortPin5=0x0001
PortPin6=0x0002
PortPin7=0x0003
PortPin8=0x0004
PortPin9=0x0005
PortPin10=0x0006
PortPin11=0x0007
PortPin12=0x0203
PortPin13=0x0300
PortPin14=0x0301
PortPin15=0x0302
PortPin16=0x0303
PortPin17=0x0304
PortPin18=0x0305
PortPin19=0x0306
PortPin20=0x0307
PortPin27=0x0200
PortPin28=0x0201
PortPin29=0x0202
PortPin30=0x0206
PortPin31=0x0207
PortPin32=0x0100
PortPin33=0x0101
PortPin34=0x0102
PortPin35=0x0103
PortPin36=0x0104
PortPin37=0x0105
PortPin38=0x0106
PortPin39=0x0107

[PortMasks]
PortMask0=0xFF
PortMask1=0xFF
PortMask2=0xCF
PortMask3=0xFF

[ADCPins]
ADC0=13
ADC1=14
ADC2=15
ADC3=16
ADC4=22
ADC5=23
ADC6=24
ADC7=25

[Code]
;Substitute macros
;%c Clock Speed
;%o Operand
;%s Prescaler
;%p PortID
;%m MaskBits
;%i Inverse Mask
;%a ADC channel
;%a Config Address
;%v Config Value
;%r Interrupt Flag Register
;%b Interrupt Flag Bit
;%n Interrupt Macro Name
Directives="#define MCK %c\n#include <Cstartup_SAM7.c>\n#include <board.h>\n#include <arm7io.c>\n#include <internals.c>\n#include <MX_interrupts.h>\n#include <MX_defs.h>\n"
MainStart="void main()\n{\n"
MainEnd="\tmainendloop: goto mainendloop;\n}\n\n"
IntStart="void FC_Interrupt(unsigned int, unsigned int);\nvoid FC_Interrupt(unsigned int periphID, unsigned int IFlags)\n{\n"
IntEnd="}\n"
Initialise="AT91F_PIO_CfgInput(AT91C_BASE_PIOA, 0xffffffff);\n\tAT91C_BASE_PIOA->PIO_IFER = 0xffffffff;\n\tAT91C_BASE_PIOA->PIO_PPUDR = 0xffffffff;\n\tAT91C_BASE_TCB->TCB_BMR = 0;\n\tAT91F_ADC_CfgTimings(AT91C_BASE_ADC, MCKMHz, 4, 50, 2000);\n"
IntInit="InterruptCfg();\n"
InputCmdFull="%o=port%p_in(0xff);\n"
InputCmdOneBit="%o=port%p_in(%m);\n"
InputCmdMask="%o=port%p_in(%m);\n"
OutputCmdFull="port%p_out(%o,0xff);\n"
OutputCmdOneBit="port%p_out(%o,%m);\n"
OutputCmdMask="port%p_out(%o,%m);\n"
DelayCmdS="delay_s(%o);\n"
DelayCmdMs="delay_ms(%o);\n"
ADCCapture="AT91F_ADC_EnableChannel(AT91C_BASE_ADC, (1 << %a));\nAT91F_ADC_StartConversion(AT91C_BASE_ADC);\nwhile(!(AT91F_ADC_GetStatus(AT91C_BASE_ADC) & (1 << %a)));\nAT91F_ADC_EnableChannel(AT91C_BASE_ADC, (1 << %a));\n"
ADCHigh="unsigned int iRetVal;\niRetVal = AT91F_ADC_GetLastConvertedData(AT91C_BASE_ADC) >> 2;\nreturn (iRetVal);\n"
ADCLow="unsigned int iRetVal;\niRetVal = AT91F_ADC_GetLastConvertedData(AT91C_BASE_ADC) & 0x000000ff;\nreturn (iRetVal);\n"
ADCFull="unsigned int iRetVal;\niRetVal = AT91F_ADC_GetLastConvertedData(AT91C_BASE_ADC);\nreturn (iRetVal);\n"
InitialPortLetter="a"
ConfigData="#pragma DATA %a, %v\n"
IntHandler=""

[Defines]
Define1=#define MX_ARM7
Define2=#define MX_PWM
Define3=#define MX_PWM_CNT 2
Define4=#define MX_PWM_TRIS1
Define5=#define MX_PWM_TRIS2
Define6=#define MX_PWM_1
Define7=#define MX_PWM_2
Define8=#define MX_SPI
Define9=#define MX_SPI_B

[Interrupts]
;first 3 should always be 1=TMR0, 2=RB0INT, 3=PORTB
;any other interrupts need to also have this set: "intcon.PEIE=1;\n"
GeneralInit=""
Count=6
1=TMR0_8BIT
2=IRQ0
3=IRQ1
4=PORTB
5=TMR1
6=TMR2

[TMR0_8BIT]
;it is vital that this section remains exactly as-is (for all chips?)
Name="TMR0 8-BIT"
FlagReg=
FlagBit=
UseExplicitHandlerCode=1
HandlerCode="if ((periphID == AT91C_ID_TC0) && (IFlags & AT91C_TC_CPCS))\n{\n\tFCM_%n();\n}\n"
EnReg=
EnBit=
UseExplicitEnableCode=1
EnableCode="AT91C_BASE_TC0->TC_RC = 0x00000100;\nAT91C_BASE_TC0->TC_IER = AT91C_TC_CPCS;\n"
DisableCode="AT91C_BASE_TC0->TC_IDR = AT91C_TC_CPCS;\n"

OptCnt=2
TmrOpt=1
Opt1="Clock Source Select"
Opt1Cnt=8
Opt1_1="Internal clock (MCK) 1:2"
Opt1_1Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c000;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt1_2="Internal clock (MCK) 1:8"
Opt1_2Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c001;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt1_3="Internal clock (MCK) 1:32"
Opt1_3Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c002;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt1_4="Internal clock (MCK) 1:128"
Opt1_4Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c003;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt1_5="Internal clock (MCK) 1:1024"
Opt1_5Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c004;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt1_6="External clock (XC0)"
Opt1_6Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c005;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt1_7="Internal clock (XC1)"
Opt1_7Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c006;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt1_8="Internal clock (XC2)"
Opt1_8Val="AT91F_TC0_CfgPMC();\nAT91C_BASE_TC0->TC_CMR = 0x0000c007;\nAT91C_BASE_TC0->TC_CCR = 0x05;\n"
Opt2="Source Edge Select"
Opt2Cnt=2
Opt2_1="high-to-low transition"
Opt2_1Val="AT91C_BASE_TC0->TC_CMR |= 0x00000008;\n"
Opt2_2="low-to-high transition"
Opt2_2Val="AT91C_BASE_TC0->TC_CMR &= 0xfffffff7;\n"

[IRQ0]
Name=IRQ0
FlagReg=
FlagBit=
UseExplicitHandlerCode=1
HandlerCode="if (periphID == AT91C_ID_IRQ0)\n{\n\tFCM_%n();\n}\n"
EnReg=
EnBit=
UseExplicitEnableCode=1
EnableCode="AT91F_AIC_EnableIt(AT91C_BASE_AIC,AT91C_ID_IRQ0);"
DisableCode="AT91F_AIC_DisableIt(AT91C_BASE_AIC,AT91C_ID_IRQ0);"
IntPort=3
IntPin=3
OptCnt=1
TmrOpt=0
Opt1="Interrupt Edge Select"
Opt1Cnt=2
Opt1_1="rising edge of IRQ0"
Opt1_1Val="AT91F_AIC_ConfigureIt(AT91C_BASE_AIC,AT91C_ID_IRQ0,4,AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE,IRQ0_Interrupt);\n"
Opt1_2="falling edge of IRQ0"
Opt1_2Val="AT91F_AIC_ConfigureIt(AT91C_BASE_AIC,AT91C_ID_IRQ1,4,AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED,IRQ0_Interrupt);\n"

[IRQ1]
Name=IRQ1
FlagReg=
FlagBit=
UseExplicitHandlerCode=1
HandlerCode="if (periphID == AT91C_ID_IRQ1)\n{\n\tFCM_%n();\n}\n"
EnReg=
EnBit=
UseExplicitEnableCode=1
EnableCode="AT91F_AIC_EnableIt(AT91C_BASE_AIC,AT91C_ID_IRQ1);"
DisableCode="AT91F_AIC_DisableIt(AT91C_BASE_AIC,AT91C_ID_IRQ1);"
IntPort=3
IntPin=6
OptCnt=1
TmrOpt=0
Opt1="Interrupt Edge Select"
Opt1Cnt=2
Opt1_1="rising edge of IRQ1"
Opt1_1Val="AT91F_AIC_ConfigureIt(AT91C_BASE_AIC,AT91C_ID_IRQ1,4,AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE,IRQ1_Interrupt);\n"
Opt1_2="falling edge of IRQ1"
Opt1_2Val="AT91F_AIC_ConfigureIt(AT91C_BASE_AIC,AT91C_ID_IRQ1,4,AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED,IRQ1_Interrupt);\n"

[PORTB]
Name=(this is retrieved from the resource file)
FlagReg=
FlagBit=
UseExplicitHandlerCode=1
HandlerCode="if ((periphID == AT91C_ID_PIOA) && (IFlags & (PORTB4 | PORTB5 | PORTB6 | PORTB7)))\n{\n\tFCM_%n();\n}\n"
EnReg=
EnBit=
UseExplicitEnableCode=1
EnableCode="AT91C_BASE_PIOA->PIO_IER = PORTB4 | PORTB5 | PORTB6 | PORTB7;\n"
DisableCode="AT91C_BASE_PIOA->PIO_IDR = PORTB4 | PORTB5 | PORTB6 | PORTB7;\n"
OptCnt=0
TmrOpt=0

[TMR1]
;NOTE:
Name="TMR1 Compare"
FlagReg=
FlagBit=
UseExplicitHandlerCode=1
HandlerCode="if ((periphID == AT91C_ID_TC1) && (IFlags & AT91C_TC_CPCS))\n{\n\tFCM_%n();\n}\n"
EnReg=
EnBit=
UseExplicitEnableCode=1
EnableCode="AT91C_BASE_TC1->TC_IER = AT91C_TC_CPCS;\n"
DisableCode="AT91C_BASE_TC1->TC_IDR = AT91C_TC_CPCS;\n"

OptCnt=3
TmrOpt=3
Opt1="Clock Source Select"
Opt1Cnt=8
Opt1_1="Internal clock (MCK) 1:2"
Opt1_1Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c000;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt1_2="Internal clock (MCK) 1:8"
Opt1_2Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c001;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt1_3="Internal clock (MCK) 1:32"
Opt1_3Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c002;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt1_4="Internal clock (MCK) 1:128"
Opt1_4Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c003;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt1_5="Internal clock (MCK) 1:1024"
Opt1_5Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c004;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt1_6="External clock (XC0)"
Opt1_6Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c005;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt1_7="Internal clock (XC1)"
Opt1_7Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c006;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt1_8="Internal clock (XC2)"
Opt1_8Val="AT91F_TC1_CfgPMC();\nAT91C_BASE_TC1->TC_CMR = 0x0000c007;\nAT91C_BASE_TC1->TC_CCR = 0x05;\n"
Opt2="Count mode"
Opt2Cnt=9
Opt2_1="8-bit count"
Opt2_1Val="AT91C_BASE_TC1->TC_RC = 0x00000100;\n"
Opt2_2="9-bit count"
Opt2_2Val="AT91C_BASE_TC1->TC_RC = 0x00000200;\n"
Opt2_3="10-bit count"
Opt2_3Val="AT91C_BASE_TC1->TC_RC = 0x00000400;\n"
Opt2_4="11-bit count"
Opt2_4Val="AT91C_BASE_TC1->TC_RC = 0x00000800;\n"
Opt2_5="12-bit count"
Opt2_5Val="AT91C_BASE_TC1->TC_RC = 0x00001000;\n"
Opt2_6="13-bit count"
Opt2_6Val="AT91C_BASE_TC1->TC_RC = 0x00002000;\n"
Opt2_7="14-bit count"
Opt2_7Val="AT91C_BASE_TC1->TC_RC = 0x00004000;\n"
Opt2_8="15-bit count"
Opt2_8Val="AT91C_BASE_TC1->TC_RC = 0x00008000;\n"
Opt2_9="16-bit count"
Opt2_9Val="AT91C_BASE_TC1->TC_RC = 0x00000000;\n"
Opt3="Source Edge Select"
Opt3Cnt=2
Opt3_1="high-to-low transition"
Opt3_1Val="AT91C_BASE_TC1->TC_CMR |= 0x00000008;\n"
Opt3_2="low-to-high transition"
Opt3_2Val="AT91C_BASE_TC1->TC_CMR &= 0xfffffff7;\n"

[TMR2]
;NOTE:
Name="TMR2 Compare"
FlagReg=
FlagBit=
UseExplicitHandlerCode=1
HandlerCode="if ((periphID == AT91C_ID_TC2) && (IFlags & AT91C_TC_CPCS))\n{\n\tFCM_%n();\n}\n"
EnReg=
EnBit=
UseExplicitEnableCode=1
EnableCode="AT91C_BASE_TC2->TC_IER = AT91C_TC_CPCS;\n"
DisableCode="AT91C_BASE_TC2->TC_IDR = AT91C_TC_CPCS;\n"

OptCnt=3
TmrOpt=3
Opt1="Clock Source Select"
Opt1Cnt=8
Opt1_1="Internal clock (MCK) 1:2"
Opt1_1Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c000;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt1_2="Internal clock (MCK) 1:8"
Opt1_2Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c001;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt1_3="Internal clock (MCK) 1:32"
Opt1_3Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c002;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt1_4="Internal clock (MCK) 1:128"
Opt1_4Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c003;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt1_5="Internal clock (MCK) 1:1024"
Opt1_5Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c004;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt1_6="External clock (XC0)"
Opt1_6Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c005;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt1_7="Internal clock (XC1)"
Opt1_7Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c006;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt1_8="Internal clock (XC2)"
Opt1_8Val="AT91F_TC2_CfgPMC();\nAT91C_BASE_TC2->TC_CMR = 0x0000c007;\nAT91C_BASE_TC2->TC_CCR = 0x05;\n"
Opt2="Count mode"
Opt2Cnt=9
Opt2_1="8-bit count"
Opt2_1Val="AT91C_BASE_TC2->TC_RC = 0x00000100;\n"
Opt2_2="9-bit count"
Opt2_2Val="AT91C_BASE_TC2->TC_RC = 0x00000200;\n"
Opt2_3="10-bit count"
Opt2_3Val="AT91C_BASE_TC2->TC_RC = 0x00000400;\n"
Opt2_4="11-bit count"
Opt2_4Val="AT91C_BASE_TC2->TC_RC = 0x00000800;\n"
Opt2_5="12-bit count"
Opt2_5Val="AT91C_BASE_TC2->TC_RC = 0x00001000;\n"
Opt2_6="13-bit count"
Opt2_6Val="AT91C_BASE_TC2->TC_RC = 0x00002000;\n"
Opt2_7="14-bit count"
Opt2_7Val="AT91C_BASE_TC2->TC_RC = 0x00004000;\n"
Opt2_8="15-bit count"
Opt2_8Val="AT91C_BASE_TC2->TC_RC = 0x00008000;\n"
Opt2_9="16-bit count"
Opt2_9Val="AT91C_BASE_TC2->TC_RC = 0x00000000;\n"
Opt3="Source Edge Select"
Opt3Cnt=2
Opt3_1="high-to-low transition"
Opt3_1Val="AT91C_BASE_TC2->TC_CMR |= 0x00000008;\n"
Opt3_2="low-to-high transition"
Opt3_2Val="AT91C_BASE_TC2->TC_CMR &= 0xfffffff7;\n"