//************************************************************************************ //** //** File name: C:\Documents and Settings\Gerry\Mijn documenten\Canbus flow.c //** Generated by: Flowcode v3.6.11.53 //** Date: Thursday, June 11, 2009 16:54:09 //** Licence: Professional //** Registered to: coca-cola //** //** //** http://www.matrixmultimedia.com //************************************************************************************ #define MX_PIC //Defines voor de microcontroller #define P18F2580 #define MX_EE #define MX_EE_TYPE3 #define MX_EE_SIZE 256 #define MX_SPI #define MX_SPI_C #define MX_SPI_SDI 4 #define MX_SPI_SDO 5 #define MX_SPI_SCK 3 #define MX_UART #define MX_UART_C #define MX_UART_TX 6 #define MX_UART_RX 7 #define MX_I2C #define MX_MI2C #define MX_I2C_C #define MX_I2C_SDA 4 #define MX_I2C_SCL 3 #define MX_PWM #define MX_PWM_CNT 1 #define MX_PWM_TRIS1 trisc #define MX_PWM_1 2 #define MX_ECAN //Functies #include #pragma CLOCK_FREQ 20000000 //Configuratiegegevens //Interne functies #include "C:\Program Files\Matrix Multimedia\Flowcode V3\FCD\internals.h" //Macro functie declaraties //Variable declaraties char FCV_VALUE1; char FCV_LOGICA; char FCV_VALUE2; char FCV_TRIGGERVALUE; char FCV_DIGITAAL1; char FCV_VALUE3; char FCV_VALUE4; char FCV_VALUE5; char FCV_RXDATA1; char FCV_VALUE6; char FCV_RXDATA2; char FCV_ADRES; char FCV_VALUE7; char FCV_VALUE8; char FCV_VALUE9; char FCV_RXADRES; char FCV_VALUE; char FCV_DIGITAAL; //CAN0: //Macro functie declaraties void FCD_CAN0_GetDefines(); void FCD_CAN0_Init(); void FCD_CAN0_SendBuffer(char buffer); char FCD_CAN0_CheckRx(char buffer); void FCD_CAN0_ShowLEDs(char led1, char led2); char FCD_CAN0_ReadSwitches(); char FCD_CAN0_GetRxDataCount(char buffer); char FCD_CAN0_GetRxData(char buffer, char index); void FCD_CAN0_SetTxData(char buffer, char data_cnt, char d0, char d1, char d2, char d3, char d4, char d5, char d6, char d7); void FCD_CAN0_SetTxID(char buffer, char hi, char lo); char FCD_CAN0_GetRxIDLo(char buffer); char FCD_CAN0_GetRxIDHi(char buffer); //ADC0: //Macro functie declaraties void FCD_ADC0_SampleADC(); char FCD_ADC0_ReadAsByte(); short FCD_ADC0_ReadAsInt(); //Toegevoegde definities //CAN0: //Macro implementaties void FCD_CAN0_GetDefines() { } //Dummy end of function to allow defines to be added correctly //common defines #define CAN_CHIPSEL 6 #define CAN_INTERRUPT 0 #define CAN_INT_MASK 1 #define CNF1_VAL 1 #define CNF2_VAL 218 #define CNF3_VAL 1 #define BFPCTRL_VAL 12 #define TXRTSCTRL_VAL 0 //Transmission messages (TXB0-2): //Transmission message (TXB0): #define TXB0CTRL_VAL 3 #define TXB0SIDH_VAL 86 #define TXB0SIDL_VAL 0 #define TXB0DLC_VAL 2 #define TXB0DB0_VAL 85 #define TXB0DB1_VAL 170 #define TXB0DB2_VAL 0 #define TXB0DB3_VAL 0 #define TXB0DB4_VAL 0 #define TXB0DB5_VAL 0 #define TXB0DB6_VAL 0 #define TXB0DB7_VAL 0 //Transmission message (TXB1): #define TXB1CTRL_VAL 2 #define TXB1SIDH_VAL 88 #define TXB1SIDL_VAL 0 #define TXB1DLC_VAL 7 #define TXB1DB0_VAL 9 #define TXB1DB1_VAL 8 #define TXB1DB2_VAL 7 #define TXB1DB3_VAL 6 #define TXB1DB4_VAL 5 #define TXB1DB5_VAL 4 #define TXB1DB6_VAL 3 #define TXB1DB7_VAL 2 //Transmission message (TXB2): #define TXB2CTRL_VAL 1 #define TXB2SIDH_VAL 90 #define TXB2SIDL_VAL 0 #define TXB2DLC_VAL 0 #define TXB2DB0_VAL 0 #define TXB2DB1_VAL 0 #define TXB2DB2_VAL 0 #define TXB2DB3_VAL 0 #define TXB2DB4_VAL 0 #define TXB2DB5_VAL 0 #define TXB2DB6_VAL 0 #define TXB2DB7_VAL 0 //Reception (TXB0-1) //Reception (RXB0) #define RXB0CTRL_VAL 32 #define RXF0SIDH_VAL 87 #define RXF0SIDL_VAL 32 #define RXF1SIDH_VAL 255 #define RXF1SIDL_VAL 224 #define RXM0SIDH_VAL 255 #define RXM0SIDL_VAL 224 //Reception (RXB1) #define RXB1CTRL_VAL 32 #define RXF2SIDH_VAL 88 #define RXF2SIDL_VAL 0 #define RXF3SIDH_VAL 255 #define RXF3SIDL_VAL 224 #define RXF4SIDH_VAL 255 #define RXF4SIDL_VAL 224 #define RXF5SIDH_VAL 255 #define RXF5SIDL_VAL 224 #define RXM1SIDH_VAL 255 #define RXM1SIDL_VAL 224 ////////////////////////////////////////////////////////// //THESE SHOULD *NOT* BE MODIFIED BY THE USER: ///////////////////////////////////////////////////////// #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif #ifdef MX_SPI_B #define MX_CAN_PORT portb #define MX_CAN_TRIS trisb #define MX_CAN_SDO_TRIS trisb #define MX_CAN_CS_PORT portb #define MX_CAN_CS_TRIS trisb #define MX_CAN_INT_PORT portb #define MX_CAN_INT_TRIS trisb #endif #ifdef MX_SPI_C #define MX_CAN_PORT portc #define MX_CAN_TRIS trisc #define MX_CAN_SDO_TRIS trisc #define MX_CAN_CS_PORT portc #define MX_CAN_CS_TRIS trisc #define MX_CAN_INT_PORT portc #define MX_CAN_INT_TRIS trisc #endif #ifdef MX_SPI_BCB #define MX_CAN_PORT portb #define MX_CAN_TRIS trisb #define MX_CAN_SDO_TRIS trisc #define MX_CAN_CS_PORT portb #define MX_CAN_CS_TRIS trisb #define MX_CAN_INT_PORT portb #define MX_CAN_INT_TRIS trisb #endif #ifdef MX_MIAC #undef MX_CAN_CS_PORT #undef MX_CAN_CS_TRIS #undef MX_CAN_INT_PORT #undef MX_CAN_INT_TRIS #define MX_CAN_CS_PORT portd #define MX_CAN_CS_TRIS trisd #define MX_CAN_INT_PORT porta #define MX_CAN_INT_TRIS trisa #endif #ifndef MX_CAN_PORT asm error "MX_CAN_PORT has not been assigned" #endif //This is the interrupt enable register (set to flag on message received - RX0 and RX1 - and on an error) //#define CANINTE_VAL 0x23 //TODO: should we turn interrupts off, like this: //#define CANINTE_VAL 0x00 //TODO: of just turn on RX interrupts, like this: #define CANINTE_VAL 0x03 //One shot mode, CLKOUT enable, CLKOUT prescaler #define CANCTRL_VAL 0x80 #define MX_CANSTAT_VAL 0x80 #define TXB0EID8_VAL 0x00 #define TXB0EID0_VAL 0x00 #define TXB1EID8_VAL 0x00 #define TXB1EID0_VAL 0x00 #define TXB2EID8_VAL 0x00 #define TXB2EID0_VAL 0x00 #define RXF0EID8_VAL 0x00 #define RXF0EID0_VAL 0x00 #define RXF1EID8_VAL 0x00 #define RXF1EID0_VAL 0x00 #define RXF2EID8_VAL 0x00 #define RXF2EID0_VAL 0x00 #define RXF3EID8_VAL 0x00 #define RXF3EID0_VAL 0x00 #define RXF4EID8_VAL 0x00 #define RXF4EID0_VAL 0x00 #define RXF5EID8_VAL 0x00 #define RXF5EID0_VAL 0x00 #define RXM0EID8_VAL 0xFF #define RXM0EID0_VAL 0xFF #define RXM1EID8_VAL 0xFF #define RXM1EID0_VAL 0xFF #define CAN_MAX_TX_BUF (3) #define CAN_MAX_RX_BUF (2) // ********************************************************************** // * MCP2510 Register Definitions * // ********************************************************************** //Configuration Registers #define MX_CANSTAT 0x0E #define CANCTRL 0x0F #define BFPCTRL 0x0C #define TEC 0x1C #define REC 0x1D #define CNF3 0x28 #define CNF2 0x29 #define CNF1 0x2A #define CANINTE 0x2B #define CANINTF 0x2C #define EFLG 0x2D #define TXRTSCTRL 0x0D //Receive Filters //NOTE: Use "a" for i={0,1,2} and "b" for i={3,4,5} #define RXFxaSIDH(i) ((i*4)+0) #define RXFxaSIDL(i) ((i*4)+1) #define RXFxaEID8(i) ((i*4)+2) #define RXFxaEID0(i) ((i*4)+3) #define RXFxbSIDH(i) ((i*4)+4) #define RXFxbSIDL(i) ((i*4)+5) #define RXFxbEID8(i) ((i*4)+6) #define RXFxbEID0(i) ((i*4)+7) /* #define RXF0SIDH 0x00 #define RXF0SIDL 0x01 #define RXF0EID8 0x02 #define RXF0EID0 0x03 #define RXF1SIDH 0x04 #define RXF1SIDL 0x05 #define RXF1EID8 0x06 #define RXF1EID0 0x07 #define RXF2SIDH 0x08 #define RXF2SIDL 0x09 #define RXF2EID8 0x0A #define RXF2EID0 0x0B #define RXF3SIDH 0x10 #define RXF3SIDL 0x11 #define RXF3EID8 0x12 #define RXF3EID0 0x13 #define RXF4SIDH 0x14 #define RXF4SIDL 0x15 #define RXF4EID8 0x16 #define RXF4EID0 0x17 #define RXF5SIDH 0x18 #define RXF5SIDL 0x19 #define RXF5EID8 0x1A #define RXF5EID0 0x1B */ //Receive Masks #define RXMxSIDH(i) ((i*4)+0x20) #define RXMxSIDL(i) ((i*4)+0x21) #define RXMxEID8(i) ((i*4)+0x22) #define RXMxEID0(i) ((i*4)+0x23) //Tx Buffers #define TXBxCTRL(i) ((i*0x10)+0x30) #define TXBxSIDH(i) ((i*0x10)+0x31) #define TXBxSIDL(i) ((i*0x10)+0x32) #define TXBxEID8(i) ((i*0x10)+0x33) #define TXBxEID0(i) ((i*0x10)+0x34) #define TXBxDLC(i) ((i*0x10)+0x35) #define TXBxD0(i) ((i*0x10)+0x36) #define TXBxDy(i,j) ((i*0x10)+0x36+j) //Rx Buffers #define RXBxCTRL(i) ((i*0x10)+0x60) #define RXBxSIDH(i) ((i*0x10)+0x61) #define RXBxSIDL(i) ((i*0x10)+0x62) #define RXBxEID8(i) ((i*0x10)+0x63) #define RXBxEID0(i) ((i*0x10)+0x64) #define RXBxDLC(i) ((i*0x10)+0x65) #define RXBxD0(i) ((i*0x10)+0x66) #define RXBxDy(i,j) ((i*0x10)+0x66+j) // ******************************************************************* // * Bit register masks * // ******************************************************************* //TXBnCTRL #define MX_TXREQ 0x08 #define TXP 0x03 //RXBnCTRL #define RXM 0x60 #define BUKT 0x04 //CANCTRL #define REQOP 0xE0 #define MX_ABAT 0x10 #define CLKEN 0x04 #define CLKPRE 0x03 #define OSM 0x08 // (ST) new for the 2515 //MX_CANSTAT #define REQOP 0xE0 #define ICOD 0x0E //CANINTE #define RX0IE 0x01 #define RX1IE 0x02 #define TX0IE 0x04 #define TX1IE 0x80 #define TX2IE 0x10 #define MX_ERRIE 0x20 #define MX_WAKIE 0x40 #define IVMIE 0x80 //CANINTF #define RX0IF 0x01 #define RX1IF 0x02 #define TX0IF 0x04 #define TX1IF 0x80 #define TX2IF 0x10 #define MX_ERRIF 0x20 #define MX_WAKIF 0x40 #define IVMIF 0x80 //BFPCTRL #define B1BFS 0x20 #define B0BFS 0x10 #define B1BFE 0x08 #define B0BFE 0x04 #define B1BFM 0x02 #define B0BFM 0x01 //CNF1 Masks #define SJW 0xC0 #define BRP 0x3F //CNF2 Masks #define BTLMODE 0x80 #define MX_SAM 0x40 #define PHSEG1 0x38 #define PRSEG 0x07 //CNF3 Masks #define MX_WAKFIL 0x40 #define PHSEG2 0x07 #define SOF 0x80 // (ST) new for the 2515 //TXRTSCTRL Masks #define TXB2RTS 0x04 #define TXB1RTS 0x02 #define TXB0RTS 0x01 // ******************************************************************* // * Bit Timing Configuration * // ******************************************************************* //CNF1 #define SJW_1TQ 0x40 #define SJW_2TQ 0x80 #define SJW_3TQ 0x90 #define SJW_4TQ 0xC0 //CNF2 #define BTLMODE_CNF3 0x80 #define BTLMODE_PH1_IPT 0x00 #define SMPL_3X 0x40 #define SMPL_1X 0x00 #define PHSEG1_8TQ 0x38 #define PHSEG1_7TQ 0x30 #define PHSEG1_6TQ 0x28 #define PHSEG1_5TQ 0x20 #define PHSEG1_4TQ 0x18 #define PHSEG1_3TQ 0x10 #define PHSEG1_2TQ 0x08 #define PHSEG1_1TQ 0x00 #define PRSEG_8TQ 0x07 #define PRSEG_7TQ 0x06 #define PRSEG_6TQ 0x05 #define PRSEG_5TQ 0x04 #define PRSEG_4TQ 0x03 #define PRSEG_3TQ 0x02 #define PRSEG_2TQ 0x01 #define PRSEG_1TQ 0x00 //CNF3 #define PHSEG2_8TQ 0x07 #define PHSEG2_7TQ 0x06 #define PHSEG2_6TQ 0x05 #define PHSEG2_5TQ 0x04 #define PHSEG2_4TQ 0x03 #define PHSEG2_3TQ 0x02 #define PHSEG2_2TQ 0x01 #define PHSEG2_1TQ 0x00 #define MX_WAKFIL_ENABLED 0x40 #define MX_WAKFIL_DISABLED 0x00 // ******************************************************************* // * Control/Configuration Registers * // ******************************************************************* //CANINTE #define RX0IE_ENABLED 0x01 #define RX0IE_DISABLED 0x00 #define RX1IE_ENABLED 0x02 #define RX1IE_DISABLED 0x00 #define G_RXIE_ENABLED 0x03 #define G_RXIE_DISABLED 0x00 #define TX0IE_ENABLED 0x04 #define TX0IE_DISABLED 0x00 #define TX1IE_ENABLED 0x08 #define TX2IE_DISABLED 0x00 #define TX2IE_ENABLED 0x10 #define TX2IE_DISABLED 0x00 #define G_TXIE_ENABLED 0x1C #define G_TXIE_DISABLED 0x00 #define MX_ERRIE_ENABLED 0x20 #define MX_ERRIE_DISABLED 0x00 #define MX_WAKIE_ENABLED 0x40 #define MX_WAKIE_DISABLED 0x00 #define IVRE_ENABLED 0x80 #define IVRE_DISABLED 0x00 //CANINTF #define RX0IF_SET 0x01 #define RX0IF_RESET 0x00 #define RX1IF_SET 0x02 #define RX1IF_RESET 0x00 #define TX0IF_SET 0x04 #define TX0IF_RESET 0x00 #define TX1IF_SET 0x08 #define TX2IF_RESET 0x00 #define TX2IF_SET 0x10 #define TX2IF_RESET 0x00 #define MX_ERRIF_SET 0x20 #define MX_ERRIF_RESET 0x00 #define MX_WAKIF_SET 0x40 #define MX_WAKIF_RESET 0x00 #define IVRF_SET 0x80 #define IVRF_RESET 0x00 //CANCTRL #define REQOP_CONFIG 0x80 #define REQOP_LISTEN 0x60 #define REQOP_LOOPBACK 0x40 #define REQOP_SLEEP 0x20 #define REQOP_NORMAL 0x00 #define ABORT 0x10 #define CLKOUT_ENABLED 0x04 #define CLKOUT_DISABLED 0x00 #define CLKOUT_PRE_8 0x03 #define CLKOUT_PRE_4 0x02 #define CLKOUT_PRE_2 0x01 #define CLKOUT_PRE_1 0x00 //MX_CANSTAT #define OPMODE_CONFIG 0x80 #define OPMODE_LISTEN 0x60 #define OPMODE_LOOPBACK 0x40 #define OPMODE_SLEEP 0x20 #define OPMODE_NORMAL 0x00 //RXBnCTRL #define RXM_RCV_ALL 0x60 #define RXM_VALID_EXT 0x40 #define RXM_VALID_STD 0x20 #define RXM_VALID_ALL 0x00 #define RXRTR_REMOTE 0x08 #define RXRTR_NO_REMOTE 0x00 #define BUKT_ROLLOVER 0x04 #define BUKT_NO_ROLLOVER 0x00 #define FILHIT0_FLTR_1 0x01 #define FILHIT0_FLTR_0 0x00 #define FILHIT1_FLTR_5 0x05 #define FILHIT1_FLTR_4 0x04 #define FILHIT1_FLTR_3 0x03 #define FILHIT1_FLTR_2 0x02 #define FILHIT1_FLTR_1 0x01 #define FILHIT1_FLTR_0 0x00 //TXBnCTRL #define MX_TXREQ_SEND 0x08 #define MX_TXREQ_ABORT 0x00 #define TXP_HIGHEST 0x03 #define TXP_INTER_HIGH 0x02 #define TXP_INTER_LOW 0x01 #define TXP_LOWEST 0x00 // ******************************************************************* // * Register Bit Masks * // ******************************************************************* #define DLC_0 0x00 #define DLC_1 0x01 #define DLC_2 0x02 #define DLC_3 0x03 #define DLC_4 0x04 #define DLC_5 0x05 #define DLC_6 0x06 #define DLC_7 0x07 #define DLC_8 0x08 // ******************************************************************* // * CAN SPI commands * // ******************************************************************* #define CAN_RESET 0xC0 #define CAN_READ 0x03 #define CAN_WRITE 0x02 #define CAN_RD_STATUS 0xA0 #define CAN_BIT_MODIFY 0x05 #define CAN_RTS 0x80 #define CAN_RTS_TXB0 0x81 #define CAN_RTS_TXB1 0x82 //#define CAN_RTS_TXB2 0x83 // (ST) I think this is wrong..so I changed it to this: #define CAN_RTS_TXB2 0x84 //#define CAN_RTS_TXB(i) (0x80 + (0x01 << i)) //NOTE: the above line does not work because the RHS of a shift cannot be a variable // (ST) I also added these for multiple requests... #define CAN_RTS_TXB01 0x83 #define CAN_RTS_TXB02 0x85 #define CAN_RTS_TXB12 0x86 #define CAN_RTS_TXB012 0x87 #define CAN_RX_STATUS 0xB0 #define CAN_RD_RXBUF_ID(i) (0x90 + (i*4)) #define CAN_RD_RXBUF_DT(i) (0x92 + (i*4)) #define CAN_LD_TXBUF_ID(i) (0x40 + (i*2)) #define CAN_LD_TXBUF_DT(i) (0x41 + (i*2)) // ******************************************************************* // * Miscellaneous * // ******************************************************************* //uncomment this if supporting extended identifiers: //#define CAN_USE_EXID char BF_MASK; char CAN_MSG_DLC; char CAN_MSG_DATA[8]; #ifdef CAN_USE_EXID char CAN_MSG_ID[4]; #else char CAN_MSG_ID[2]; #endif //internal function prototypes // ******************************************************************* // * internal function prototypes * // ******************************************************************* void SPI_Init(); char SPI_SendByte(char byte); char CAN_MaskFromBit(char which_bit); void CAN_Reset(); void CAN_Write(char addr, char data); char CAN_Read(char addr); void CAN_Config(char cfg); char CAN_ReadStatus(); char CAN_ReadRXStatus(); void CAN_BitModify(char addr, char mask, char data); char CAN_ReadRX_ID_and_Data(char buffer); //internal function implementations void SPI_Init() { #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //initialise spi set_bit(MX_CAN_TRIS,MX_SPI_SDI); clear_bit(MX_CAN_SDO_TRIS,MX_SPI_SDO); clear_bit(MX_CAN_TRIS,MX_SPI_SCK); clear_bit(MX_CAN_CS_TRIS,CAN_CHIPSEL); set_bit(MX_CAN_INT_TRIS,CAN_INTERRUPT); //disable the CAN chip select line set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspstat = 0; set_bit(sspstat, CKE); //SMP = 0, CKE = 1 #ifdef SSPCON sspcon = 0; //CKP = 0 and SPI master Fosc/4 set_bit(sspcon, SSPEN); //Enable SPI #endif #ifdef SSPCON1 sspcon1 = 0; //CKP = 0 and SPI master Fosc/4 set_bit(sspcon1, SSPEN); //Enable SPI #endif //get the mask for the BF bit for later use BF_MASK = CAN_MaskFromBit(BF); } char SPI_SendByte(char byte) { char retval = 0; //send the byte sspbuf = byte; //wait until data has been received (transmit complete) while ((sspstat & BF_MASK) == 0); //get received byte retval = sspbuf; return retval; } char CAN_MaskFromBit(char which_bit) { char retVal = 0; switch (which_bit) { case 0: retVal = 0x01; break; case 1: retVal = 0x02; break; case 2: retVal = 0x04; break; case 3: retVal = 0x08; break; case 4: retVal = 0x10; break; case 5: retVal = 0x20; break; case 6: retVal = 0x40; break; case 7: retVal = 0x80; break; } return (retVal); } void CAN_Reset() { #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = CAN_RESET; //send the reset byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); //wait for the CAN device to complete its OST delay_ms(1); //10us is ok, but us delay cannot be created by boostc linker } void CAN_Write(char addr, char data) { #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = CAN_WRITE; //send a byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = addr; //send the address while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = data; //send the data while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); } char CAN_Read(char addr) { char data; #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = CAN_READ; //read a byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = addr ; //send the address while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = 0x5A ; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) data = sspbuf; //read back the result //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); return (data); } void CAN_Config(char cfg) { char mode; char done = 0; while (done == 0) { CAN_Write(CANCTRL, cfg); delay_ms(1); //not sure if this is needed //read the config mode back mode = CAN_Read(MX_CANSTAT); //mask off the config bits mode = mode & 0xE0; if (mode == cfg) { //it has been set correctly done = 1; } } delay_ms(1); //not sure if this is needed } char CAN_ReadStatus() { char retval = 0; #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = CAN_RD_STATUS; //read the status while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) retval = sspbuf; //read back the result //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); return (retval); } char CAN_ReadRXStatus() { char retval = 0; #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = CAN_RX_STATUS; //read the status while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) retval = sspbuf; //read back the result //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); return (retval); } void CAN_BitModify(char addr, char mask, char data) { #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = CAN_BIT_MODIFY; //bit modify while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = addr; //send the address while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = mask; //send the mask while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = data; //send the data while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); } char CAN_ReadRX_ID_and_Data(char buffer) { //populates CAN_MSG_ID[], CAN_MSG_DLC, and CAN_MSG_DATA[], and returns CAN_MSG_DLC char idx = 0; if (buffer > CAN_MAX_RX_BUF) { return (0); } #ifndef MX_SPI asm error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = CAN_RD_RXBUF_ID(buffer); //read the RX ID while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_ID[idx++] = sspbuf; //read back SIDH sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_ID[idx++] = sspbuf; //read back SIDL sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) #ifdef CAN_USE_EXID CAN_MSG_ID[idx++] = sspbuf; //read back EXID8 #endif sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) #ifdef CAN_USE_EXID CAN_MSG_ID[idx++] = sspbuf; //read back EXID0 #endif sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DLC = sspbuf; //read back DLC //now read the data (if there is any) if (CAN_MSG_DLC > 0) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[0] = sspbuf; //read back D0 if (CAN_MSG_DLC > 1) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[1] = sspbuf; //read back D1 if (CAN_MSG_DLC > 2) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[2] = sspbuf; //read back D2 if (CAN_MSG_DLC > 3) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[3] = sspbuf; //read back D3 if (CAN_MSG_DLC > 4) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[4] = sspbuf; //read back D4 if (CAN_MSG_DLC > 5) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[5] = sspbuf; //read back D5 if (CAN_MSG_DLC > 6) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[6] = sspbuf; //read back D6 if (CAN_MSG_DLC > 7) { sspbuf = 0x5A; //send a don't care byte while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) CAN_MSG_DATA[7] = sspbuf; //read back D7 } } } } } } } } //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); return (CAN_MSG_DLC); } // Dummy function to close the defines section off void CAN_Dummy_Function(); void CAN_Dummy_Function() { } void FCD_CAN0_Init() { //Init SPI SPI_Init(); //brief pause here delay_ms(50); //Reset the CAN device CAN_Reset(); //Put the CAN device into config mode CAN_Config(REQOP_CONFIG); //Initialise all the CAN device registers //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); SPI_SendByte(CAN_WRITE); //CAN write mode SPI_SendByte(0x00); //start writting at address 0x00 SPI_SendByte(RXF0SIDH_VAL); // RXF0SIDH 0x00 SPI_SendByte(RXF0SIDL_VAL); // RXF0SIDL 0x01 SPI_SendByte(RXF0EID8_VAL); // RXF0EID8 0x02 SPI_SendByte(RXF0EID0_VAL); // RXF0EID0 0x03 SPI_SendByte(RXF1SIDH_VAL); // RXF1SIDH 0x04 SPI_SendByte(RXF1SIDL_VAL); // RXF1SIDL 0x05 SPI_SendByte(RXF1EID8_VAL); // RXF1EID8 0x06 SPI_SendByte(RXF1EID0_VAL); // RXF1EID0 0x07 SPI_SendByte(RXF2SIDH_VAL); // RXF2SIDH 0x08 SPI_SendByte(RXF2SIDL_VAL); // RXF2SIDL 0x09 SPI_SendByte(RXF2EID8_VAL); // RXF2EID8 0x0A SPI_SendByte(RXF2EID0_VAL); // RXF2EID0 0x0B SPI_SendByte(BFPCTRL_VAL); // BFPCTRL 0x0C SPI_SendByte(TXRTSCTRL_VAL); // TXRTSCTRL 0x0D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x0E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x0F SPI_SendByte(RXF3SIDH_VAL); // RXF3SIDH 0x10 SPI_SendByte(RXF3SIDL_VAL); // RXF3SIDL 0x11 SPI_SendByte(RXF3EID8_VAL); // RXF3EID8 0x12 SPI_SendByte(RXF3EID0_VAL); // RXF3EID0 0x13 SPI_SendByte(RXF4SIDH_VAL); // RXF4SIDH 0x14 SPI_SendByte(RXF4SIDL_VAL); // RXF4SIDL 0x15 SPI_SendByte(RXF4EID8_VAL); // RXF4EID8 0x16 SPI_SendByte(RXF4EID0_VAL); // RXF4EID0 0x17 SPI_SendByte(RXF5SIDH_VAL); // RXF5SIDH 0x18 SPI_SendByte(RXF5SIDL_VAL); // RXF5SIDL 0x19 SPI_SendByte(RXF5EID8_VAL); // RXF5EID8 0x1A SPI_SendByte(RXF5EID0_VAL); // RXF5EID0 0x1B SPI_SendByte(0x00); // TEC 0x1C SPI_SendByte(0x00); // REC 0x1D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x1E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x1F SPI_SendByte(RXM0SIDH_VAL); // RXM0SIDH 0x20 SPI_SendByte(RXM0SIDL_VAL); // RXM0SIDL 0x21 SPI_SendByte(RXM0EID8_VAL); // RXM0EID8 0x22 SPI_SendByte(RXM0EID0_VAL); // RXM0EID0 0x23 SPI_SendByte(RXM1SIDH_VAL); // RXM1SIDH 0x20 SPI_SendByte(RXM1SIDL_VAL); // RXM1SIDL 0x21 SPI_SendByte(RXM1EID8_VAL); // RXM1EID8 0x26 SPI_SendByte(RXM1EID0_VAL); // RXM1EID0 0x27 SPI_SendByte(CNF3_VAL); // CNF3 0x28 SPI_SendByte(CNF2_VAL); // CNF2 0x29 SPI_SendByte(CNF1_VAL); // CNF1 0x2A SPI_SendByte(CANINTE_VAL); // CANINTE 0x2B SPI_SendByte(0x00); // CANINTF 0x2C SPI_SendByte(0x00); // EFLG 0x2D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x2E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x2F SPI_SendByte(TXB0CTRL_VAL); // TXB0CTRL 0x30 SPI_SendByte(TXB0SIDH_VAL); // TXB0SIDH 0x31 SPI_SendByte(TXB0SIDL_VAL); // TXB0SIDL 0x32 SPI_SendByte(TXB0EID8_VAL); // TXB0EID8 0x33 SPI_SendByte(TXB0EID0_VAL); // TXB0EID0 0x34 SPI_SendByte(TXB0DLC_VAL); // TXB0DLC 0x35 SPI_SendByte(TXB0DB0_VAL); // TXB0DB0 0x36 SPI_SendByte(TXB0DB1_VAL); // TXB0DB1 0x37 SPI_SendByte(TXB0DB2_VAL); // TXB0DB2 0x38 SPI_SendByte(TXB0DB3_VAL); // TXB0DB3 0x39 SPI_SendByte(TXB0DB4_VAL); // TXB0DB4 0x3A SPI_SendByte(TXB0DB5_VAL); // TXB0DB5 0x3B SPI_SendByte(TXB0DB6_VAL); // TXB0DB6 0x3C SPI_SendByte(TXB0DB7_VAL); // TXB0DB7 0x3D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x3E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x3F SPI_SendByte(TXB1CTRL_VAL); // TXB1CTRL 0x40 Highest priority SPI_SendByte(TXB1SIDH_VAL); // TXB1SIDH 0x41 SPI_SendByte(TXB1SIDL_VAL); // TXB1SIDL 0x42 SPI_SendByte(TXB1EID8_VAL); // TXB1EID8 0x43 SPI_SendByte(TXB1EID0_VAL); // TXB1EID0 0x44 SPI_SendByte(TXB1DLC_VAL); // TXB1DLC 0x45 SPI_SendByte(TXB1DB0_VAL); // TXB1DB0 0x46 SPI_SendByte(TXB1DB1_VAL); // TXB1DB1 0x47 SPI_SendByte(TXB1DB2_VAL); // TXB1DB2 0x48 SPI_SendByte(TXB1DB3_VAL); // TXB1DB3 0x49 SPI_SendByte(TXB1DB4_VAL); // TXB1DB4 0x4A SPI_SendByte(TXB1DB5_VAL); // TXB1DB5 0x4B SPI_SendByte(TXB1DB6_VAL); // TXB1DB6 0x4C SPI_SendByte(TXB1DB7_VAL); // TXB1DB7 0x4D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x4E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x4F SPI_SendByte(TXB2CTRL_VAL); // TXB2CTRL 0x50 SPI_SendByte(TXB2SIDH_VAL); // TXB2SIDH 0x51 SPI_SendByte(TXB2SIDL_VAL); // TXB2SIDL 0x52 SPI_SendByte(TXB2EID8_VAL); // TXB2EID8 0x53 SPI_SendByte(TXB2EID0_VAL); // TXB2EID0 0x54 SPI_SendByte(TXB2DLC_VAL); // TXB2DLC 0x55 SPI_SendByte(TXB2DB0_VAL); // TXB2DB0 0x56 SPI_SendByte(TXB2DB1_VAL); // TXB2DB1 0x57 SPI_SendByte(TXB2DB2_VAL); // TXB2DB2 0x58 SPI_SendByte(TXB2DB3_VAL); // TXB2DB3 0x59 SPI_SendByte(TXB2DB4_VAL); // TXB2DB4 0x5A SPI_SendByte(TXB2DB5_VAL); // TXB2DB5 0x5B SPI_SendByte(TXB2DB6_VAL); // TXB2DB6 0x5C SPI_SendByte(TXB2DB7_VAL); // TXB2DB7 0x5D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x5E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x5F SPI_SendByte(RXB0CTRL_VAL); // RXB0CTRL 0x60 SPI_SendByte(0x00); // RXB0SIDH 0x61 SPI_SendByte(0x00); // RXB0SIDL 0x62 SPI_SendByte(0x00); // RXB0EID8 0x63 SPI_SendByte(0x00); // RXB0EID0 0x64 SPI_SendByte(0x00); // RXB0DLC 0x65 SPI_SendByte(0x00); // RXB0DB0 0x66 SPI_SendByte(0x00); // RXB0DB1 0x67 SPI_SendByte(0x00); // RXB0DB2 0x68 SPI_SendByte(0x00); // RXB0DB3 0x69 SPI_SendByte(0x00); // RXB0DB4 0x6A SPI_SendByte(0x00); // RXB0DB5 0x6B SPI_SendByte(0x00); // RXB0DB6 0x6C SPI_SendByte(0x00); // RXB0DB7 0x6D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x6E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x6F SPI_SendByte(RXB1CTRL_VAL); // RXB1CTRL 0x70 SPI_SendByte(0x00); // RXB1SIDH 0x71 SPI_SendByte(0x00); // RXB1SIDL 0x72 SPI_SendByte(0x00); // RXB1EID8 0x73 SPI_SendByte(0x00); // RXB1EID0 0x74 SPI_SendByte(0x00); // RXB1DLC 0x75 SPI_SendByte(0x00); // RXB1DB0 0x76 SPI_SendByte(0x00); // RXB1DB1 0x77 SPI_SendByte(0x00); // RXB1DB2 0x78 SPI_SendByte(0x00); // RXB1DB3 0x79 SPI_SendByte(0x00); // RXB1DB4 0x7A SPI_SendByte(0x00); // RXB1DB5 0x7B SPI_SendByte(0x00); // RXB1DB6 0x7C SPI_SendByte(0x00); // RXB1DB7 0x7D SPI_SendByte(MX_CANSTAT_VAL); // MX_CANSTAT 0x7E SPI_SendByte(CANCTRL_VAL); // CANCTRL 0x7F //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); //Put the CAN device into normal mode CAN_Config(REQOP_NORMAL); } void FCD_CAN0_SendBuffer(char buffer) { // Code_CAN_SendBuffer if (buffer > CAN_MAX_TX_BUF) { return; } char cmd = CAN_RTS; //default value switch (buffer) { case 0: cmd = CAN_RTS_TXB0; break; case 1: cmd = CAN_RTS_TXB1; break; case 2: cmd = CAN_RTS_TXB2; break; } //NOTE: this following didn't work: //cmd = CAN_RTS_TXB(buffer); #ifndef MX_SPI #pragma error "Chip does not have SPI capability " #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); sspbuf = cmd; //send the RTS command while ((sspstat & BF_MASK) == 0); //wait until data has been received (transmit complete) //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); } char FCD_CAN0_CheckRx(char buffer) { //returns 1 if the buffer is full, 0 otherwise char rx_status; char status_mask; char retval = 0; if (buffer > CAN_MAX_TX_BUF) { return (0); } if (buffer == 1) { //status_mask = 0x02; //if using CAN_ReadStatus status_mask = 0x80; //if using CAN_ReadRXStatus } else { //status_mask = 0x01; //if using CAN_ReadStatus status_mask = 0x40; //if using CAN_ReadRXStatus } //rx_status = CAN_ReadStatus(); //if using CAN_ReadStatus rx_status = CAN_ReadRXStatus(); //if using CAN_ReadRXStatus if ((rx_status & status_mask) != 0) { retval = 1; //now read in the id and data info CAN_ReadRX_ID_and_Data(buffer); } return (retval); } void FCD_CAN0_ShowLEDs(char led1, char led2) { // Code_CAN_ShowLEDs char data = 0; if (led1 != 0) { data = data | 0x10; } if (led2 != 0) { data = data | 0x20; } CAN_BitModify(BFPCTRL, 0x30, data); } char FCD_CAN0_ReadSwitches() { // Code_CAN_ReadSwitches char retval = CAN_Read(TXRTSCTRL); retval = retval & 0x38; // mask off the state retval = retval / 8; // divide by 8 to leave switch data in bottom 3 bits return (retval); } char FCD_CAN0_GetRxDataCount(char buffer) { // Code_CAN_GetRxDataCount if (buffer > CAN_MAX_TX_BUF) { return (0); } return (CAN_MSG_DLC); } char FCD_CAN0_GetRxData(char buffer, char index) { // Code_CAN_GetRxData if (buffer > CAN_MAX_TX_BUF) { return (0); } if (index > 7) { return (0); } return (CAN_MSG_DATA[index]); } void FCD_CAN0_SetTxData(char buffer, char data_cnt, char d0, char d1, char d2, char d3, char d4, char d5, char d6, char d7) { // Code_CAN_SetTxData if (buffer > CAN_MAX_TX_BUF) { return; } if (data_cnt > 8) { return; } char i; char dlc_addr = TXBxDLC(buffer); #ifndef MX_SPI #pragma error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); SPI_SendByte(CAN_WRITE); //CAN write mode SPI_SendByte(dlc_addr); //start writting at address 0x00 SPI_SendByte(data_cnt); //send the DLC value //now fill the data bytes... //if (data_cnt > 0) //{ // for (i=0; i 0) { SPI_SendByte(d0); if (data_cnt > 1) { SPI_SendByte(d1); if (data_cnt > 2) { SPI_SendByte(d2); if (data_cnt > 3) { SPI_SendByte(d3); if (data_cnt > 4) { SPI_SendByte(d4); if (data_cnt > 5) { SPI_SendByte(d5); if (data_cnt > 6) { SPI_SendByte(d6); if (data_cnt > 7) { SPI_SendByte(d7); } } } } } } } } //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); } void FCD_CAN0_SetTxID(char buffer, char hi, char lo) { // Code_SetTxID if (buffer > CAN_MAX_TX_BUF) { return; } char i; char id_addr = TXBxSIDH(buffer); #ifndef MX_SPI #pragma error "Chip does not have SPI capability" #endif //enable SPI clear_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); SPI_SendByte(CAN_WRITE); //CAN write mode SPI_SendByte(id_addr); //start writting at hi id address SPI_SendByte(hi); //send the Hi ID value SPI_SendByte(lo); //send the Lo ID value //disable SPI set_bit(MX_CAN_CS_PORT, CAN_CHIPSEL); } char FCD_CAN0_GetRxIDLo(char buffer) { // Code_CAN_GetRxIDLo if (buffer > CAN_MAX_TX_BUF) { return (0); } return (CAN_MSG_ID[1]); } char FCD_CAN0_GetRxIDHi(char buffer) { // Code_CAN_GetRxIDHi if (buffer > CAN_MAX_TX_BUF) { return (0); } return (CAN_MSG_ID[0]); } //ADC0: //Macro implementaties void FCD_ADC0_SampleADC() { //This is from the FCD file... //set up ADC conversion char old_tris, cnt; #define MX_ADC_SAMP_TIME 40 adcon2 = 0x03; //find appropriate bit #if (0 == 0) #define MX_ADC_TRIS_REG trisa #define MX_ADC_TRIS_MSK 0x01 adcon1 = 0x0E; #endif #if (0 == 1) #define MX_ADC_TRIS_REG trisa #define MX_ADC_TRIS_MSK 0x02 adcon1 = 0x0D; #endif #if (0 == 2) #define MX_ADC_TRIS_REG trisa #define MX_ADC_TRIS_MSK 0x04 adcon1 = 0x0C; #endif #if (0 == 3) #define MX_ADC_TRIS_REG trisa #define MX_ADC_TRIS_MSK 0x08 adcon1 = 0x0B; #endif #if (0 == 4) #define MX_ADC_TRIS_REG trisa #define MX_ADC_TRIS_MSK 0x20 adcon1 = 0x0A; #endif #if (0 == 8) #define MX_ADC_TRIS_REG trisb #define MX_ADC_TRIS_MSK 0x02 adcon1 = 0x06; #endif #if (0 == 9) #define MX_ADC_TRIS_REG trisb #define MX_ADC_TRIS_MSK 0x10 adcon1 = 0x05; #endif #if (0 == 10) #define MX_ADC_TRIS_REG trisb #define MX_ADC_TRIS_MSK 0x01 adcon1 = 0x04; #endif //sanity check #ifndef MX_ADC_TRIS_REG #pragma error ADC conversion code error - please contact technical support #endif //store old tris value, and set the i/o pin as an input old_tris = MX_ADC_TRIS_REG; MX_ADC_TRIS_REG = MX_ADC_TRIS_REG | MX_ADC_TRIS_MSK; //turn ADC on adcon0 = 0x01 | (0 << 2); //wait the acquisition time cnt = 0; while (cnt < MX_ADC_SAMP_TIME) cnt++; //begin conversion and wait until it has finished adcon0 = adcon0 | 0x02; while (adcon0 & 0x02); //restore old tris value, and reset adc registers MX_ADC_TRIS_REG = old_tris; adcon1 = 0x0f; adcon0 = 0x00; #undef MX_ADC_TRIS_REG #undef MX_ADC_TRIS_MSK #undef MX_ADC_SAMP_TIME } char FCD_ADC0_ReadAsByte() { //This is from the FCD file... return adresh; } short FCD_ADC0_ReadAsInt() { //This is from the FCD file... short iRetVal; iRetVal = (adresh << 2); iRetVal += (adresl >> 6); return (iRetVal); } //Macro implementaties //Toegevoegde implementaties void main() { //Initialisatie adcon1 = 0x0F; //Interrupt initialisatie code //Component Macro Aanroepen //Component Macro Aanroepen: CAN(0)::Init FCD_CAN0_Init(); //Defaults //Calculation: // Logica = 0 // Triggervalue = 120 // Digitaal1 = 0 // Digitaal = 0 FCV_LOGICA = 0; FCV_TRIGGERVALUE = 120; FCV_DIGITAAL1 = 0; FCV_DIGITAAL = 0; //Adres input //Input: PORT A -> Adres trisa = trisa | 0x3c; FCV_ADRES = porta & 0x3c; //Component Macro Aanroepen //Component Macro Aanroepen: CAN(0)::SetTxID(0, 0, Adres) FCD_CAN0_SetTxID(0, 0, FCV_ADRES); //Loop //Loop: While 1 while (1) { // //Component Macro Aanroepen: CAN(0)::GetRxIDLo(RXadres) FCD_CAN0_GetRxIDLo(FCV_RXADRES); //Triggervalue //Decision: RXdata1 = 600? if (FCV_RXDATA1 == 600) { // //Component Macro Aanroepen: CAN(0)::GetRxData(RXdata1, RXdata2) FCD_CAN0_GetRxData(FCV_RXDATA1, FCV_RXDATA2); //Trigger value change //Calculation: // Triggervalue = RXdata2 FCV_TRIGGERVALUE = FCV_RXDATA2; //RX led //Output: 1 -> C0 trisc = trisc & 0xfe; if (1) portc = (portc & 0xfe) | 0x01; else portc = portc & 0xfe; } //Logica //Decision: RXdata1 = 700? if (FCV_RXDATA1 == 700) { // //Component Macro Aanroepen: CAN(0)::GetRxData(RXdata1, RXdata2) FCD_CAN0_GetRxData(FCV_RXDATA1, FCV_RXDATA2); //Calculation //Calculation: // Logica = RXdata1 FCV_LOGICA = FCV_RXDATA1; //RX led //Output: 1 -> C0 trisc = trisc & 0xfe; if (1) portc = (portc & 0xfe) | 0x01; else portc = portc & 0xfe; } //Logicakeuze //Decision: Logica = 0? if (FCV_LOGICA == 0) { // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value=ADC(0)::ReadAsByte FCV_VALUE = FCD_ADC0_ReadAsByte(); //Sampelen //Decision: Triggervalue < Value? if (FCV_TRIGGERVALUE < FCV_VALUE) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value1=ADC(0)::ReadAsByte FCV_VALUE1 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value < Value1? if (FCV_VALUE < FCV_VALUE1) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value2=ADC(0)::ReadAsByte FCV_VALUE2 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value1 < Value2? if (FCV_VALUE1 < FCV_VALUE2) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value3=ADC(0)::ReadAsByte FCV_VALUE3 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value2 < Value3? if (FCV_VALUE2 < FCV_VALUE3) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value4=ADC(0)::ReadAsByte FCV_VALUE4 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value3 < Value4? if (FCV_VALUE3 < FCV_VALUE4) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value5=ADC(0)::ReadAsByte FCV_VALUE5 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value4 < Value5? if (FCV_VALUE4 < FCV_VALUE5) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value6=ADC(0)::ReadAsByte FCV_VALUE6 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value5 < Value6? if (FCV_VALUE5 < FCV_VALUE6) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value7=ADC(0)::ReadAsByte FCV_VALUE7 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value6 < Value7? if (FCV_VALUE6 < FCV_VALUE7) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value8=ADC(0)::ReadAsByte FCV_VALUE8 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value7 < Value8? if (FCV_VALUE7 < FCV_VALUE8) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value9=ADC(0)::ReadAsByte FCV_VALUE9 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value8 < Value9? if (FCV_VALUE8 < FCV_VALUE9) { //Delay //Delay: 1 ms delay_ms(1); //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value9, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE9, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value9) FCD_CAN0_SendBuffer(FCV_VALUE9); } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value8, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE8, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value8) FCD_CAN0_SendBuffer(FCV_VALUE8); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value7, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE7, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value7) FCD_CAN0_SendBuffer(FCV_VALUE7); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value6, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE6, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value6) FCD_CAN0_SendBuffer(FCV_VALUE6); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value5, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE5, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value5) FCD_CAN0_SendBuffer(FCV_VALUE5); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value4, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE4, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value4) FCD_CAN0_SendBuffer(FCV_VALUE4); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value3, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE3, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value3) FCD_CAN0_SendBuffer(FCV_VALUE3); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value2, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE2, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value2) FCD_CAN0_SendBuffer(FCV_VALUE2); } } else { //TX led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value1, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE1, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value1) FCD_CAN0_SendBuffer(FCV_VALUE1); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value) FCD_CAN0_SendBuffer(FCV_VALUE); } } } else { //Component Macro Aanroepen //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); //Component Macro Aanroepen //Component Macro Aanroepen: Value=ADC(0)::ReadAsByte FCV_VALUE = FCD_ADC0_ReadAsByte(); //Sampelen //Decision: Triggervalue > Value? if (FCV_TRIGGERVALUE > FCV_VALUE) { //Delay //Delay: 1 ms delay_ms(1); //Component Macro Aanroepen //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); //Component Macro Aanroepen //Component Macro Aanroepen: Value1=ADC(0)::ReadAsByte FCV_VALUE1 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value > Value1? if (FCV_VALUE > FCV_VALUE1) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value2=ADC(0)::ReadAsByte FCV_VALUE2 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value1 > Value2? if (FCV_VALUE1 > FCV_VALUE2) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value3=ADC(0)::ReadAsByte FCV_VALUE3 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value2 > Value3? if (FCV_VALUE2 > FCV_VALUE3) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value4=ADC(0)::ReadAsByte FCV_VALUE4 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value3 > Value4? if (FCV_VALUE3 > FCV_VALUE4) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value5=ADC(0)::ReadAsByte FCV_VALUE5 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value4 > Value5? if (FCV_VALUE4 > FCV_VALUE5) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value6=ADC(0)::ReadAsByte FCV_VALUE6 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value5 > Value6? if (FCV_VALUE5 > FCV_VALUE6) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value7=ADC(0)::ReadAsByte FCV_VALUE7 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value6 > Value7? if (FCV_VALUE6 > FCV_VALUE7) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value8=ADC(0)::ReadAsByte FCV_VALUE8 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value7 > Value8? if (FCV_VALUE7 > FCV_VALUE8) { //Delay //Delay: 1 ms delay_ms(1); // //Component Macro Aanroepen: ADC(0)::SampleADC FCD_ADC0_SampleADC(); // //Component Macro Aanroepen: Value9=ADC(0)::ReadAsByte FCV_VALUE9 = FCD_ADC0_ReadAsByte(); //Decision //Decision: Value8 > Value9? if (FCV_VALUE8 > FCV_VALUE9) { //Delay //Delay: 1 ms delay_ms(1); //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value9, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE9, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value9) FCD_CAN0_SendBuffer(FCV_VALUE9); } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value8, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE8, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value8) FCD_CAN0_SendBuffer(FCV_VALUE8); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value7, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE7, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value7) FCD_CAN0_SendBuffer(FCV_VALUE7); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value6, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE6, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value6) FCD_CAN0_SendBuffer(FCV_VALUE6); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value5, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE5, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value5) FCD_CAN0_SendBuffer(FCV_VALUE5); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value4, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE4, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value4) FCD_CAN0_SendBuffer(FCV_VALUE4); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value3, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE3, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value3) FCD_CAN0_SendBuffer(FCV_VALUE3); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value2, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE2, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value2) FCD_CAN0_SendBuffer(FCV_VALUE2); } } else { //TX led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value1, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE1, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value1) FCD_CAN0_SendBuffer(FCV_VALUE1); } } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Value, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_VALUE, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Value) FCD_CAN0_SendBuffer(FCV_VALUE); } } } //Nullen values //Calculation: // Value = 0 // Value1 = 0 // Value2 = 0 // Value3 = 0 // Value4 = 0 // Value5 = 0 // Value6 = 0 // Value7 = 0 // Value8 = 0 // Value9 = 0 FCV_VALUE = 0; FCV_VALUE1 = 0; FCV_VALUE2 = 0; FCV_VALUE3 = 0; FCV_VALUE4 = 0; FCV_VALUE5 = 0; FCV_VALUE6 = 0; FCV_VALUE7 = 0; FCV_VALUE8 = 0; FCV_VALUE9 = 0; //Leds off //Output: 0 -> PORT C trisc = trisc & 0xfc; portc = (portc & 0xfc) | (0 & 0x03); //Digitale inputs //Input: PORT B -> Digitaal trisb = trisb | 0xc0; FCV_DIGITAAL = portb & 0xc0; //Digitaal //Decision: Digitaal = Digitaal1? if (FCV_DIGITAAL == FCV_DIGITAAL1) { } else { //TX Led //Output: 1 -> C1 trisc = trisc & 0xfd; if (1) portc = (portc & 0xfd) | 0x02; else portc = portc & 0xfd; // //Component Macro Aanroepen: CAN(0)::SetTxData(0, 8, Digitaal, 0, 0, 0, 0, 0, 0, 0) FCD_CAN0_SetTxData(0, 8, FCV_DIGITAAL, 0, 0, 0, 0, 0, 0, 0); // //Component Macro Aanroepen: CAN(0)::SendBuffer(Digitaal) FCD_CAN0_SendBuffer(FCV_DIGITAAL); //Calculation //Calculation: // Digitaal1 = Digitaal FCV_DIGITAAL1 = FCV_DIGITAAL; //Delay //Delay: 1 ms delay_ms(1); } //Leds off //Output: 0 -> PORT C trisc = trisc & 0xfc; portc = (portc & 0xfc) | (0 & 0x03); } mainendloop: goto mainendloop; } void interrupt(void) { }