[General]
CfgVersion=4


[PIC24F04KA200]

pgmmem=0x0
~pgmmem=0xaff
cfgmem=0xf80000
~cfgmem=0xf80011
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xd020000

configslots=18
0xf80000=FBS
0xf80001=
0xf80002=
0xf80003=
0xf80004=FGS
0xf80005=
0xf80006=FOSCSEL
0xf80007=
0xf80008=FOSC
0xf80009=
0xf8000a=FWDT
0xf8000b=
0xf8000c=FPOR
0xf8000d=
0xf8000e=FICD
0xf8000f=
0xf80010=FDS
0xf80011=

FBS_unused=0x0
FBS~1=RESERVED,0xf,Reserved

FBS~1~1=0xf,0xf,Reserved

FGS_unused=0x0
FGS~1=GWRP,0x1,General Segment Write Protect
FGS~2=GSS,0x2,Standard Security General Segment

FGS~1~1=0x1,0x1,Disabled
FGS~1~2=0x1,0x0,Enabled

FGS~2~1=0x2,0x2,Disabled
FGS~2~2=0x2,0x0,Enabled

FOSCSEL_unused=0x0
FOSCSEL~1=FNOSC,0x7,Oscillator Select
FOSCSEL~2=IES0,0x80,Internal External Switch Over bit

FOSCSEL~1~1=0x7,0x0,Fast RC Oscillator (FRC)
FOSCSEL~1~2=0x7,0x1,Fast RC Oscillator with divide-by-N with PLL Module (FRCDIV+PLL)
FOSCSEL~1~3=0x7,0x2,Primary Oscillator (MS, HS, EC)
FOSCSEL~1~4=0x7,0x3,Primary Oscillator with PLL Module (MS+PLL, HS+PLL, EC+PLL)
FOSCSEL~1~5=0x7,0x4,Secondary Oscillator (SOSC)
FOSCSEL~1~6=0x7,0x5,Low Power RC Oscillator (LPRC)
FOSCSEL~1~7=0x7,0x7,Fast RC Oscillator with divide-by-N (FRCDIV)
FOSCSEL~1~8=0x7,0x6,Low-Power FRC oscillator with divide-by-N (LPFRCDIV)

FOSCSEL~2~1=0x80,0x80,Internal External Switch Over mode enabled (Two-Speed Start-up enabled)
FOSCSEL~2~2=0x80,0x0,Internal External Switch Over mode disabled (Two-Speed Start-up disabled)

FOSC_unused=0x0
FOSC~1=POSCMD,0x3,Primary Oscillator Configuration bits
FOSC~2=OSCIOFNC,0x4,CLKO Enable Configuration bit
FOSC~3=POSCFREQ,0x18,Primary Oscillator Frequency Range Configuration bits
FOSC~4=SOSCSEL,0x20,SOSC Power Selection Configuration bits
FOSC~5=FCKSM,0xc0,Clock Switching and Monitor Selection

FOSC~1~1=0x3,0x3,Primary oscillator disabled
FOSC~1~2=0x3,0x2,HS oscillator mode selected (4 MHz - 25 MHz)
FOSC~1~3=0x3,0x1,XT oscillator mode selected (100 kHz - 4 MHz)
FOSC~1~4=0x3,0x0,External clock mode selected

FOSC~2~1=0x4,0x4,CLKO output signal active on the OSCO pin
FOSC~2~2=0x4,0x0,CLKO output disabled

FOSC~3~1=0x18,0x18,Primary oscillator / External Clock input frequency greater than 8 MHz
FOSC~3~2=0x18,0x10,Primary oscillator / External Clock input frequency between 100 kHz and 8 MHz
FOSC~3~3=0x18,0x8,Primary oscillator / External Clock input frequency less than 100 kHz

FOSC~4~1=0x20,0x20,High Power SOSC circuit selected
FOSC~4~2=0x20,0x0,Low Power SOSC circuit selected

FOSC~5~1=0x80,0x80,Clock switching is disabled, fail safe clock monitor is disabled
FOSC~5~2=0xc0,0x40,Clock switching is enabled, fail safe clock monitor is disabled
FOSC~5~3=0xc0,0x0,Clock switching is enabled, fail safe clock monitor is disabled

FWDT_unused=0x0
FWDT~1=WDTPS,0xf,Watchdog Timer Postscale Select bits
FWDT~2=FWPSA0,0x10,WDT Prescaler
FWDT~3=WINDIS,0x40,Windowed Watchdog Timer Disable bit
FWDT~4=FWDTEN,0x80,Watchdog Timer Enable bit

FWDT~1~1=0xf,0xf,1:32,768
FWDT~1~2=0xf,0xe,1:16,384
FWDT~1~3=0xf,0xd,1:8,192
FWDT~1~4=0xf,0xc,1:4,096
FWDT~1~5=0xf,0xb,1:2,048
FWDT~1~6=0xf,0xa,1:1,024
FWDT~1~7=0xf,0x9,1:512
FWDT~1~8=0xf,0x8,1:256
FWDT~1~9=0xf,0x7,1:128
FWDT~1~10=0xf,0x6,1:64
FWDT~1~11=0xf,0x5,1:32
FWDT~1~12=0xf,0x4,1:16
FWDT~1~13=0xf,0x3,1:8
FWDT~1~14=0xf,0x2,1:4
FWDT~1~15=0xf,0x1,1:2
FWDT~1~16=0xf,0x0,1:1

FWDT~2~1=0x10,0x10,WDT prescaler ratio of 1:128
FWDT~2~2=0x10,0x0,WDT prescaler ratio of 1:32

FWDT~3~1=0x40,0x40,Standard WDT selected; windowed WDT disabled
FWDT~3~2=0x40,0x0,Windowed WDT enabled

FWDT~4~1=0x80,0x80,WDT enabled
FWDT~4~2=0x80,0x0,WDT disabled (control is placed on the SWDTEN bit)

FPOR_unused=0x0
FPOR~1=BOREN,0x3,Brown-out Reset Enable bits
FPOR~2=PWRTEN,0x8,Power-up Timer Enable bit
FPOR~3=RES,0x10,Reserved
FPOR~4=BORV,0x60,Brown-out Reset Voltage bits
FPOR~5=MCLRE,0x80,MCLR Pin Enable bit

FPOR~1~1=0x3,0x3,Brown-out Reset enabled in hardware; SBOREN bit disabled
FPOR~1~2=0x3,0x2,Brown-out Reset enabled only while device active and disabled in SLEEP; SBOREN bit disabled
FPOR~1~3=0x3,0x1,Brown-out Reset controlled with the SBOREN bit setting
FPOR~1~4=0x3,0x0,Brown-out Reset disabled in hardware; SBOREN bit disabled

FPOR~2~1=0x8,0x0,PWRT disabled
FPOR~2~2=0x8,0x8,PWRT enabled

FPOR~3~1=0x10,0x10,Reserved

FPOR~4~1=0x60,0x60,VBOR set to 1.8 V min
FPOR~4~2=0x60,0x40,VBOR set to 2.7 V min
FPOR~4~3=0x60,0x20,VBOR set to 3.0 V min
FPOR~4~4=0x60,0x0,Downside protection on POR enabled

FPOR~5~1=0x80,0x80,MCLR pin enabled; RA5 input pin disabled
FPOR~5~2=0x80,0x0,RA5 input pin enabled; MCLR disabled

FICD_unused=0x0
FICD~1=RESERVED,0x3,Reserved
FICD~2=RES,0x40,Set Clip On Emulation bit
FICD~3=BACKBUG,0x80,Background Debugger Enable bit

FICD~1~1=0x3,0x3,Reserved

FICD~2~1=0x40,0x40,Reserved

FICD~3~1=0x80,0x80,Background debugger disabled
FICD~3~2=0x80,0x0,Background debugger functions enabled

FDS_unused=0x0
FDS~1=DSWDTPS,0xf,Deep Sleep Watchdog Timer Postscale Select bits
FDS~2=DSWCKSEL,0x10,DSWDT Reference Clock Select bit
FDS~3=RES,0x20,Reserved
FDS~4=DSLPBOR,0x40,Deep Sleep Zero-Power BOR Enable bit
FDS~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer Enable bit

FDS~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
FDS~1~2=0xf,0xe,1:536,870,912 (6.4 days)
FDS~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
FDS~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
FDS~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
FDS~1~6=0xf,0xa,1:2,097,152 (36 minutes)
FDS~1~7=0xf,0x9,1:524,288 (9 minutes)
FDS~1~8=0xf,0x8,1:131,072 (135 seconds)
FDS~1~9=0xf,0x7,1:32,768 (34 seconds)
FDS~1~10=0xf,0x6,1:8,192 (8.5 seconds)
FDS~1~11=0xf,0x5,1:2,048 (2.1 seconds)
FDS~1~12=0xf,0x4,1:512 (528 ms)
FDS~1~13=0xf,0x3,1:128 (132 ms)
FDS~1~14=0xf,0x2,1:32 (33 ms)
FDS~1~15=0xf,0x1,1:8 (8.3 ms)
FDS~1~16=0xf,0x0,1:2 (2.1 ms)

FDS~2~1=0x10,0x10,DSWDT uses LPRC as reference clock
FDS~2~2=0x10,0x0,DSWDT uses SOSC as reference clock

FDS~3~1=0x20,0x20,Reserved

FDS~4~1=0x40,0x40,Zero-Power BOR enabled in Deep Sleep
FDS~4~2=0x40,0x0,Zero-Power BOR disabled in Deep Sleep (does not affect operation in non Deep Sleep modes)

FDS~5~1=0x80,0x80,DSWDT enabled
FDS~5~2=0x80,0x0,DSWDT disabled

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24F04KA201]

pgmmem=0x0
~pgmmem=0xaff
cfgmem=0xf80000
~cfgmem=0xf80011
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xd000000

configslots=18
0xf80000=FBS
0xf80001=
0xf80002=
0xf80003=
0xf80004=FGS
0xf80005=
0xf80006=FOSCSEL
0xf80007=
0xf80008=FOSC
0xf80009=
0xf8000a=FWDT
0xf8000b=
0xf8000c=FPOR
0xf8000d=
0xf8000e=FICD
0xf8000f=
0xf80010=FDS
0xf80011=

FBS_unused=0x0
FBS~1=RESERVED,0xf,Reserved

FBS~1~1=0xf,0xf,Reserved

FGS_unused=0x0
FGS~1=GWRP,0x1,General Segment Write Protect
FGS~2=GSS,0x2,Standard Security General Segment

FGS~1~1=0x1,0x1,Disabled
FGS~1~2=0x1,0x0,Enabled

FGS~2~1=0x2,0x2,Disabled
FGS~2~2=0x2,0x0,Enabled

FOSCSEL_unused=0x0
FOSCSEL~1=FNOSC,0x7,Oscillator Select
FOSCSEL~2=IES0,0x80,Internal External Switch Over bit

FOSCSEL~1~1=0x7,0x0,Fast RC Oscillator (FRC)
FOSCSEL~1~2=0x7,0x1,Fast RC Oscillator with divide-by-N with PLL Module (FRCDIV+PLL)
FOSCSEL~1~3=0x7,0x2,Primary Oscillator (MS, HS, EC)
FOSCSEL~1~4=0x7,0x3,Primary Oscillator with PLL Module (MS+PLL, HS+PLL, EC+PLL)
FOSCSEL~1~5=0x7,0x4,Secondary Oscillator (SOSC)
FOSCSEL~1~6=0x7,0x5,Low Power RC Oscillator (LPRC)
FOSCSEL~1~7=0x7,0x7,Fast RC Oscillator with divide-by-N (FRCDIV)
FOSCSEL~1~8=0x7,0x6,Low-Power FRC oscillator with divide-by-N (LPFRCDIV)

FOSCSEL~2~1=0x80,0x80,Internal External Switch Over mode enabled (Two-Speed Start-up enabled)
FOSCSEL~2~2=0x80,0x0,Internal External Switch Over mode disabled (Two-Speed Start-up disabled)

FOSC_unused=0x0
FOSC~1=POSCMD,0x3,Primary Oscillator Configuration bits
FOSC~2=OSCIOFNC,0x4,CLKO Enable Configuration bit
FOSC~3=POSCFREQ,0x18,Primary Oscillator Frequency Range Configuration bits
FOSC~4=SOSCSEL,0x20,SOSC Power Selection Configuration bits
FOSC~5=FCKSM,0xc0,Clock Switching and Monitor Selection

FOSC~1~1=0x3,0x3,Primary oscillator disabled
FOSC~1~2=0x3,0x2,HS oscillator mode selected (4 MHz - 25 MHz)
FOSC~1~3=0x3,0x1,XT oscillator mode selected (100 kHz - 4 MHz)
FOSC~1~4=0x3,0x0,External clock mode selected

FOSC~2~1=0x4,0x4,CLKO output signal active on the OSCO pin
FOSC~2~2=0x4,0x0,CLKO output disabled

FOSC~3~1=0x18,0x18,Primary oscillator / External Clock input frequency greater than 8 MHz
FOSC~3~2=0x18,0x10,Primary oscillator / External Clock input frequency between 100 kHz and 8 MHz
FOSC~3~3=0x18,0x8,Primary oscillator / External Clock input frequency less than 100 kHz

FOSC~4~1=0x20,0x20,High Power SOSC circuit selected
FOSC~4~2=0x20,0x0,Low Power SOSC circuit selected

FOSC~5~1=0x80,0x80,Clock switching is disabled, fail safe clock monitor is disabled
FOSC~5~2=0xc0,0x40,Clock switching is enabled, fail safe clock monitor is disabled
FOSC~5~3=0xc0,0x0,Clock switching is enabled, fail safe clock monitor is disabled

FWDT_unused=0x0
FWDT~1=WDTPS,0xf,Watchdog Timer Postscale Select bits
FWDT~2=FWPSA0,0x10,WDT Prescaler
FWDT~3=WINDIS,0x40,Windowed Watchdog Timer Disable bit
FWDT~4=FWDTEN,0x80,Watchdog Timer Enable bit

FWDT~1~1=0xf,0xf,1:32,768
FWDT~1~2=0xf,0xe,1:16,384
FWDT~1~3=0xf,0xd,1:8,192
FWDT~1~4=0xf,0xc,1:4,096
FWDT~1~5=0xf,0xb,1:2,048
FWDT~1~6=0xf,0xa,1:1,024
FWDT~1~7=0xf,0x9,1:512
FWDT~1~8=0xf,0x8,1:256
FWDT~1~9=0xf,0x7,1:128
FWDT~1~10=0xf,0x6,1:64
FWDT~1~11=0xf,0x5,1:32
FWDT~1~12=0xf,0x4,1:16
FWDT~1~13=0xf,0x3,1:8
FWDT~1~14=0xf,0x2,1:4
FWDT~1~15=0xf,0x1,1:2
FWDT~1~16=0xf,0x0,1:1

FWDT~2~1=0x10,0x10,WDT prescaler ratio of 1:128
FWDT~2~2=0x10,0x0,WDT prescaler ratio of 1:32

FWDT~3~1=0x40,0x40,Standard WDT selected; windowed WDT disabled
FWDT~3~2=0x40,0x0,Windowed WDT enabled

FWDT~4~1=0x80,0x80,WDT enabled
FWDT~4~2=0x80,0x0,WDT disabled (control is placed on the SWDTEN bit)

FPOR_unused=0x0
FPOR~1=BOREN,0x3,Brown-out Reset Enable bits
FPOR~2=PWRTEN,0x8,Power-up Timer Enable bit
FPOR~3=RES,0x10,Reserved
FPOR~4=BORV,0x60,Brown-out Reset Voltage bits
FPOR~5=MCLRE,0x80,MCLR Pin Enable bit

FPOR~1~1=0x3,0x3,Brown-out Reset enabled in hardware; SBOREN bit disabled
FPOR~1~2=0x3,0x2,Brown-out Reset enabled only while device active and disabled in SLEEP; SBOREN bit disabled
FPOR~1~3=0x3,0x1,Brown-out Reset controlled with the SBOREN bit setting
FPOR~1~4=0x3,0x0,Brown-out Reset disabled in hardware; SBOREN bit disabled

FPOR~2~1=0x8,0x0,PWRT disabled
FPOR~2~2=0x8,0x8,PWRT enabled

FPOR~3~1=0x10,0x10,Reserved

FPOR~4~1=0x60,0x60,VBOR set to 1.8 V min
FPOR~4~2=0x60,0x40,VBOR set to 2.7 V min
FPOR~4~3=0x60,0x20,VBOR set to 3.0 V min
FPOR~4~4=0x60,0x0,Downside protection on POR enabled

FPOR~5~1=0x80,0x80,MCLR pin enabled; RA5 input pin disabled
FPOR~5~2=0x80,0x0,RA5 input pin enabled; MCLR disabled

FICD_unused=0x0
FICD~1=RESERVED,0x3,Reserved
FICD~2=RES,0x40,Set Clip On Emulation bit
FICD~3=BACKBUG,0x80,Background Debugger Enable bit

FICD~1~1=0x3,0x3,Reserved

FICD~2~1=0x40,0x40,Reserved

FICD~3~1=0x80,0x80,Background debugger disabled
FICD~3~2=0x80,0x0,Background debugger functions enabled

FDS_unused=0x0
FDS~1=DSWDTPS,0xf,Deep Sleep Watchdog Timer Postscale Select bits
FDS~2=DSWCKSEL,0x10,DSWDT Reference Clock Select bit
FDS~3=RES,0x20,Reserved
FDS~4=DSLPBOR,0x40,Deep Sleep Zero-Power BOR Enable bit
FDS~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer Enable bit

FDS~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
FDS~1~2=0xf,0xe,1:536,870,912 (6.4 days)
FDS~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
FDS~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
FDS~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
FDS~1~6=0xf,0xa,1:2,097,152 (36 minutes)
FDS~1~7=0xf,0x9,1:524,288 (9 minutes)
FDS~1~8=0xf,0x8,1:131,072 (135 seconds)
FDS~1~9=0xf,0x7,1:32,768 (34 seconds)
FDS~1~10=0xf,0x6,1:8,192 (8.5 seconds)
FDS~1~11=0xf,0x5,1:2,048 (2.1 seconds)
FDS~1~12=0xf,0x4,1:512 (528 ms)
FDS~1~13=0xf,0x3,1:128 (132 ms)
FDS~1~14=0xf,0x2,1:32 (33 ms)
FDS~1~15=0xf,0x1,1:8 (8.3 ms)
FDS~1~16=0xf,0x0,1:2 (2.1 ms)

FDS~2~1=0x10,0x10,DSWDT uses LPRC as reference clock
FDS~2~2=0x10,0x0,DSWDT uses SOSC as reference clock

FDS~3~1=0x20,0x20,Reserved

FDS~4~1=0x40,0x40,Zero-Power BOR enabled in Deep Sleep
FDS~4~2=0x40,0x0,Zero-Power BOR disabled in Deep Sleep (does not affect operation in non Deep Sleep modes)

FDS~5~1=0x80,0x80,DSWDT enabled
FDS~5~2=0x80,0x0,DSWDT disabled

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24F08KA101]

pgmmem=0x0
~pgmmem=0x15ff
cfgmem=0xf80000
~cfgmem=0xf80011
userid=
~userid=
eedata=0x7ffe00
~eedata=0x7fffff
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xd080000

configslots=18
0xf80000=FBS
0xf80001=
0xf80002=
0xf80003=
0xf80004=FGS
0xf80005=
0xf80006=FOSCSEL
0xf80007=
0xf80008=FOSC
0xf80009=
0xf8000a=FWDT
0xf8000b=
0xf8000c=FPOR
0xf8000d=
0xf8000e=FICD
0xf8000f=
0xf80010=FDS
0xf80011=

FBS_unused=0x0
FBS~1=BWRP,0x1,Table Write Protect Boot
FBS~2=BSS,0xe,Boot segment Protect

FBS~1~1=0x1,0x1,Disabled
FBS~1~2=0x1,0x0,Enabled

FBS~2~1=0xe,0xe,Disabled
FBS~2~2=0xe,0xc,Standard Security Boot Protect 000000-000AFE
FBS~2~3=0xe,0x4,High Security Boot Protect 000000-000AFE

FGS_unused=0x0
FGS~1=GWRP,0x1,General Segment Write Protect
FGS~2=GSS,0x2,Standard Security General Segment

FGS~1~1=0x1,0x1,Disabled
FGS~1~2=0x1,0x0,Enabled

FGS~2~1=0x2,0x2,Disabled
FGS~2~2=0x2,0x0,Enabled

FOSCSEL_unused=0x0
FOSCSEL~1=FNOSC,0x7,Oscillator Select
FOSCSEL~2=IES0,0x80,Internal External Switch Over bit

FOSCSEL~1~1=0x7,0x0,Fast RC Oscillator (FRC)
FOSCSEL~1~2=0x7,0x1,Fast RC Oscillator with divide-by-N with PLL Module (FRCDIV+PLL)
FOSCSEL~1~3=0x7,0x2,Primary Oscillator (MS, HS, EC)
FOSCSEL~1~4=0x7,0x3,Primary Oscillator with PLL Module (MS+PLL, HS+PLL, EC+PLL)
FOSCSEL~1~5=0x7,0x4,Secondary Oscillator (SOSC)
FOSCSEL~1~6=0x7,0x5,Low Power RC Oscillator (LPRC)
FOSCSEL~1~7=0x7,0x7,Fast RC Oscillator with divide-by-N (FRCDIV)
FOSCSEL~1~8=0x7,0x6,Low-Power FRC oscillator with divide-by-N (LPFRCDIV)

FOSCSEL~2~1=0x80,0x80,Internal External Switch Over mode enabled (Two-Speed Start-up enabled)
FOSCSEL~2~2=0x80,0x0,Internal External Switch Over mode disabled (Two-Speed Start-up disabled)

FOSC_unused=0x0
FOSC~1=POSCMD,0x3,Primary Oscillator Configuration bits
FOSC~2=OSCIOFNC,0x4,CLKO Enable Configuration bit
FOSC~3=POSCFREQ,0x18,Primary Oscillator Frequency Range Configuration bits
FOSC~4=SOSCSEL,0x20,SOSC Power Selection Configuration bits
FOSC~5=FCKSM,0xc0,Clock Switching and Monitor Selection

FOSC~1~1=0x3,0x3,Primary oscillator disabled
FOSC~1~2=0x3,0x2,HS oscillator mode selected (4 MHz - 25 MHz)
FOSC~1~3=0x3,0x1,XT oscillator mode selected (100 kHz - 4 MHz)
FOSC~1~4=0x3,0x0,External clock mode selected

FOSC~2~1=0x4,0x4,CLKO output signal active on the OSCO pin
FOSC~2~2=0x4,0x0,CLKO output disabled

FOSC~3~1=0x18,0x18,Primary oscillator / External Clock input frequency greater than 8 MHz
FOSC~3~2=0x18,0x10,Primary oscillator / External Clock input frequency between 100 kHz and 8 MHz
FOSC~3~3=0x18,0x8,Primary oscillator / External Clock input frequency less than 100 kHz

FOSC~4~1=0x20,0x20,High Power SOSC circuit selected
FOSC~4~2=0x20,0x0,Low Power SOSC circuit selected

FOSC~5~1=0x80,0x80,Clock switching is disabled, fail safe clock monitor is disabled
FOSC~5~2=0xc0,0x40,Clock switching is enabled, fail safe clock monitor is disabled
FOSC~5~3=0xc0,0x0,Clock switching is enabled, fail safe clock monitor is disabled

FWDT_unused=0x0
FWDT~1=WDTPS,0xf,Watchdog Timer Postscale Select bits
FWDT~2=FWPSA0,0x10,WDT Prescaler
FWDT~3=WINDIS,0x40,Windowed Watchdog Timer Disable bit
FWDT~4=FWDTEN,0x80,Watchdog Timer Enable bit

FWDT~1~1=0xf,0xf,1:32,768
FWDT~1~2=0xf,0xe,1:16,384
FWDT~1~3=0xf,0xd,1:8,192
FWDT~1~4=0xf,0xc,1:4,096
FWDT~1~5=0xf,0xb,1:2,048
FWDT~1~6=0xf,0xa,1:1,024
FWDT~1~7=0xf,0x9,1:512
FWDT~1~8=0xf,0x8,1:256
FWDT~1~9=0xf,0x7,1:128
FWDT~1~10=0xf,0x6,1:64
FWDT~1~11=0xf,0x5,1:32
FWDT~1~12=0xf,0x4,1:16
FWDT~1~13=0xf,0x3,1:8
FWDT~1~14=0xf,0x2,1:4
FWDT~1~15=0xf,0x1,1:2
FWDT~1~16=0xf,0x0,1:1

FWDT~2~1=0x10,0x10,WDT prescaler ratio of 1:128
FWDT~2~2=0x10,0x0,WDT prescaler ratio of 1:32

FWDT~3~1=0x40,0x40,Standard WDT selected; windowed WDT disabled
FWDT~3~2=0x40,0x0,Windowed WDT enabled

FWDT~4~1=0x80,0x80,WDT enabled
FWDT~4~2=0x80,0x0,WDT disabled (control is placed on the SWDTEN bit)

FPOR_unused=0x0
FPOR~1=BOREN,0x3,Brown-out Reset Enable bits
FPOR~2=PWRTEN,0x8,Power-up Timer Enable bit
FPOR~3=AI2C1,0x10,Alternate I2C1 Pin Mapping bit
FPOR~4=BORV,0x60,Brown-out Reset Voltage bits
FPOR~5=MCLRE,0x80,MCLR Pin Enable bit

FPOR~1~1=0x3,0x3,Brown-out Reset enabled in hardware; SBOREN bit disabled
FPOR~1~2=0x3,0x2,Brown-out Reset enabled only while device active and disabled in SLEEP; SBOREN bit disabled
FPOR~1~3=0x3,0x1,Brown-out Reset controlled with the SBOREN bit setting
FPOR~1~4=0x3,0x0,Brown-out Reset disabled in hardware; SBOREN bit disabled

FPOR~2~1=0x8,0x0,PWRT disabled
FPOR~2~2=0x8,0x8,PWRT enabled

FPOR~3~1=0x10,0x10,Default location for SCL1/SDA1 pins
FPOR~3~2=0x10,0x0,Alternate location for SCL1/SDA1 pins

FPOR~4~1=0x60,0x60,VBOR set to 1.8 V min
FPOR~4~2=0x60,0x40,VBOR set to 2.7 V min
FPOR~4~3=0x60,0x20,VBOR set to 3.0 V min
FPOR~4~4=0x60,0x0,Downside protection on POR enabled

FPOR~5~1=0x80,0x80,MCLR pin enabled; RA5 input pin disabled
FPOR~5~2=0x80,0x0,RA5 input pin enabled; MCLR disabled

FICD_unused=0x0
FICD~1=ICS,0x3,ICD Pin Placement Select bits
FICD~2=COE,0x40,Set Clip On Emulation bit
FICD~3=BACKBUG,0x80,Background Debugger Enable bit

FICD~1~1=0x3,0x3,ICD EMUC/EMUD pins are shared with PGEC1/PGED1
FICD~1~2=0x3,0x2,ICD EMUC/EMUD pins are shared with PGEC2/PGED2
FICD~1~3=0x3,0x1,ICD EMUC/EMUD pins are shared with PGEC3/PGED3

FICD~2~1=0x40,0x40,Device will reset into Operational Mode
FICD~2~2=0x40,0x0,Device will reset into Clip On Emulation Mode

FICD~3~1=0x80,0x80,Background debugger disabled
FICD~3~2=0x80,0x0,Background debugger functions enabled

FDS_unused=0x0
FDS~1=DSWDTPS,0xf,Deep Sleep Watchdog Timer Postscale Select bits
FDS~2=DSWDTLPRC,0x10,DSWDT Reference Clock Select bit
FDS~3=RTCSOSC,0x20,RTCC Reference Clock Select bit
FDS~4=DSZPBOR,0x40,Deep Sleep Zero-Power BOR Enable bit
FDS~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer Enable bit

FDS~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
FDS~1~2=0xf,0xe,1:536,870,912 (6.4 days)
FDS~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
FDS~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
FDS~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
FDS~1~6=0xf,0xa,1:2,097,152 (36 minutes)
FDS~1~7=0xf,0x9,1:524,288 (9 minutes)
FDS~1~8=0xf,0x8,1:131,072 (135 seconds)
FDS~1~9=0xf,0x7,1:32,768 (34 seconds)
FDS~1~10=0xf,0x6,1:8,192 (8.5 seconds)
FDS~1~11=0xf,0x5,1:2,048 (2.1 seconds)
FDS~1~12=0xf,0x4,1:512 (528 ms)
FDS~1~13=0xf,0x3,1:128 (132 ms)
FDS~1~14=0xf,0x2,1:32 (33 ms)
FDS~1~15=0xf,0x1,1:8 (8.3 ms)
FDS~1~16=0xf,0x0,1:2 (2.1 ms)

FDS~2~1=0x10,0x10,DSWDT uses LPRC as reference clock
FDS~2~2=0x10,0x0,DSWDT uses SOSC as reference clock

FDS~3~1=0x20,0x20,RTCC uses SOSC as reference clock
FDS~3~2=0x20,0x0,RTCC uses LPRC as reference clock

FDS~4~1=0x40,0x40,Zero-Power BOR enabled in Deep Sleep
FDS~4~2=0x40,0x0,Zero-Power BOR disabled in Deep Sleep (does not affect operation in non Deep Sleep modes)

FDS~5~1=0x80,0x80,DSWDT enabled
FDS~5~2=0x80,0x0,DSWDT disabled

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24F08KA102]

pgmmem=0x0
~pgmmem=0x15ff
cfgmem=0xf80000
~cfgmem=0xf80011
userid=
~userid=
eedata=0x7ffe00
~eedata=0x7fffff
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xd0a0000

configslots=18
0xf80000=FBS
0xf80001=
0xf80002=
0xf80003=
0xf80004=FGS
0xf80005=
0xf80006=FOSCSEL
0xf80007=
0xf80008=FOSC
0xf80009=
0xf8000a=FWDT
0xf8000b=
0xf8000c=FPOR
0xf8000d=
0xf8000e=FICD
0xf8000f=
0xf80010=FDS
0xf80011=

FBS_unused=0x0
FBS~1=BWRP,0x1,Table Write Protect Boot
FBS~2=BSS,0xe,Boot segment Protect

FBS~1~1=0x1,0x1,Disabled
FBS~1~2=0x1,0x0,Enabled

FBS~2~1=0xe,0xe,Disabled
FBS~2~2=0xe,0xc,Standard Security Boot Protect 000000-000AFE
FBS~2~3=0xe,0x4,High Security Boot Protect 000000-000AFE

FGS_unused=0x0
FGS~1=GWRP,0x1,General Segment Write Protect
FGS~2=GSS,0x2,Standard Security General Segment

FGS~1~1=0x1,0x1,Disabled
FGS~1~2=0x1,0x0,Enabled

FGS~2~1=0x2,0x2,Disabled
FGS~2~2=0x2,0x0,Enabled

FOSCSEL_unused=0x0
FOSCSEL~1=FNOSC,0x7,Oscillator Select
FOSCSEL~2=IES0,0x80,Internal External Switch Over bit

FOSCSEL~1~1=0x7,0x0,Fast RC Oscillator (FRC)
FOSCSEL~1~2=0x7,0x1,Fast RC Oscillator with divide-by-N with PLL Module (FRCDIV+PLL)
FOSCSEL~1~3=0x7,0x2,Primary Oscillator (MS, HS, EC)
FOSCSEL~1~4=0x7,0x3,Primary Oscillator with PLL Module (MS+PLL, HS+PLL, EC+PLL)
FOSCSEL~1~5=0x7,0x4,Secondary Oscillator (SOSC)
FOSCSEL~1~6=0x7,0x5,Low Power RC Oscillator (LPRC)
FOSCSEL~1~7=0x7,0x7,Fast RC Oscillator with divide-by-N (FRCDIV)
FOSCSEL~1~8=0x7,0x6,Low-Power FRC oscillator with divide-by-N (LPFRCDIV)

FOSCSEL~2~1=0x80,0x80,Internal External Switch Over mode enabled (Two-Speed Start-up enabled)
FOSCSEL~2~2=0x80,0x0,Internal External Switch Over mode disabled (Two-Speed Start-up disabled)

FOSC_unused=0x0
FOSC~1=POSCMD,0x3,Primary Oscillator Configuration bits
FOSC~2=OSCIOFNC,0x4,CLKO Enable Configuration bit
FOSC~3=POSCFREQ,0x18,Primary Oscillator Frequency Range Configuration bits
FOSC~4=SOSCSEL,0x20,SOSC Power Selection Configuration bits
FOSC~5=FCKSM,0xc0,Clock Switching and Monitor Selection

FOSC~1~1=0x3,0x3,Primary oscillator disabled
FOSC~1~2=0x3,0x2,HS oscillator mode selected (4 MHz - 25 MHz)
FOSC~1~3=0x3,0x1,XT oscillator mode selected (100 kHz - 4 MHz)
FOSC~1~4=0x3,0x0,External clock mode selected

FOSC~2~1=0x4,0x4,CLKO output signal active on the OSCO pin
FOSC~2~2=0x4,0x0,CLKO output disabled

FOSC~3~1=0x18,0x18,Primary oscillator / External Clock input frequency greater than 8 MHz
FOSC~3~2=0x18,0x10,Primary oscillator / External Clock input frequency between 100 kHz and 8 MHz
FOSC~3~3=0x18,0x8,Primary oscillator / External Clock input frequency less than 100 kHz

FOSC~4~1=0x20,0x20,High Power SOSC circuit selected
FOSC~4~2=0x20,0x0,Low Power SOSC circuit selected

FOSC~5~1=0x80,0x80,Clock switching is disabled, fail safe clock monitor is disabled
FOSC~5~2=0xc0,0x40,Clock switching is enabled, fail safe clock monitor is disabled
FOSC~5~3=0xc0,0x0,Clock switching is enabled, fail safe clock monitor is disabled

FWDT_unused=0x0
FWDT~1=WDTPS,0xf,Watchdog Timer Postscale Select bits
FWDT~2=FWPSA0,0x10,WDT Prescaler
FWDT~3=WINDIS,0x40,Windowed Watchdog Timer Disable bit
FWDT~4=FWDTEN,0x80,Watchdog Timer Enable bit

FWDT~1~1=0xf,0xf,1:32,768
FWDT~1~2=0xf,0xe,1:16,384
FWDT~1~3=0xf,0xd,1:8,192
FWDT~1~4=0xf,0xc,1:4,096
FWDT~1~5=0xf,0xb,1:2,048
FWDT~1~6=0xf,0xa,1:1,024
FWDT~1~7=0xf,0x9,1:512
FWDT~1~8=0xf,0x8,1:256
FWDT~1~9=0xf,0x7,1:128
FWDT~1~10=0xf,0x6,1:64
FWDT~1~11=0xf,0x5,1:32
FWDT~1~12=0xf,0x4,1:16
FWDT~1~13=0xf,0x3,1:8
FWDT~1~14=0xf,0x2,1:4
FWDT~1~15=0xf,0x1,1:2
FWDT~1~16=0xf,0x0,1:1

FWDT~2~1=0x10,0x10,WDT prescaler ratio of 1:128
FWDT~2~2=0x10,0x0,WDT prescaler ratio of 1:32

FWDT~3~1=0x40,0x40,Standard WDT selected; windowed WDT disabled
FWDT~3~2=0x40,0x0,Windowed WDT enabled

FWDT~4~1=0x80,0x80,WDT enabled
FWDT~4~2=0x80,0x0,WDT disabled (control is placed on the SWDTEN bit)

FPOR_unused=0x0
FPOR~1=BOREN,0x3,Brown-out Reset Enable bits
FPOR~2=PWRTEN,0x8,Power-up Timer Enable bit
FPOR~3=AI2C1,0x10,Alternate I2C1 Pin Mapping bit
FPOR~4=BORV,0x60,Brown-out Reset Voltage bits
FPOR~5=MCLRE,0x80,MCLR Pin Enable bit

FPOR~1~1=0x3,0x3,Brown-out Reset enabled in hardware; SBOREN bit disabled
FPOR~1~2=0x3,0x2,Brown-out Reset enabled only while device active and disabled in SLEEP; SBOREN bit disabled
FPOR~1~3=0x3,0x1,Brown-out Reset controlled with the SBOREN bit setting
FPOR~1~4=0x3,0x0,Brown-out Reset disabled in hardware; SBOREN bit disabled

FPOR~2~1=0x8,0x0,PWRT disabled
FPOR~2~2=0x8,0x8,PWRT enabled

FPOR~3~1=0x10,0x10,Default location for SCL1/SDA1 pins
FPOR~3~2=0x10,0x0,Alternate location for SCL1/SDA1 pins

FPOR~4~1=0x60,0x60,VBOR set to 1.8 V min
FPOR~4~2=0x60,0x40,VBOR set to 2.7 V min
FPOR~4~3=0x60,0x20,VBOR set to 3.0 V min
FPOR~4~4=0x60,0x0,Downside protection on POR enabled

FPOR~5~1=0x80,0x80,MCLR pin enabled; RA5 input pin disabled
FPOR~5~2=0x80,0x0,RA5 input pin enabled; MCLR disabled

FICD_unused=0x0
FICD~1=ICS,0x3,ICD Pin Placement Select bits
FICD~2=COE,0x40,Set Clip On Emulation bit
FICD~3=BACKBUG,0x80,Background Debugger Enable bit

FICD~1~1=0x3,0x3,ICD EMUC/EMUD pins are shared with PGEC1/PGED1
FICD~1~2=0x3,0x2,ICD EMUC/EMUD pins are shared with PGEC2/PGED2
FICD~1~3=0x3,0x1,ICD EMUC/EMUD pins are shared with PGEC3/PGED3

FICD~2~1=0x40,0x40,Device will reset into Operational Mode
FICD~2~2=0x40,0x0,Device will reset into Clip On Emulation Mode

FICD~3~1=0x80,0x80,Background debugger disabled
FICD~3~2=0x80,0x0,Background debugger functions enabled

FDS_unused=0x0
FDS~1=DSWDTPS,0xf,Deep Sleep Watchdog Timer Postscale Select bits
FDS~2=DSWDTLPRC,0x10,DSWDT Reference Clock Select bit
FDS~3=RTCSOSC,0x20,RTCC Reference Clock Select bit
FDS~4=DSZPBOR,0x40,Deep Sleep Zero-Power BOR Enable bit
FDS~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer Enable bit

FDS~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
FDS~1~2=0xf,0xe,1:536,870,912 (6.4 days)
FDS~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
FDS~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
FDS~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
FDS~1~6=0xf,0xa,1:2,097,152 (36 minutes)
FDS~1~7=0xf,0x9,1:524,288 (9 minutes)
FDS~1~8=0xf,0x8,1:131,072 (135 seconds)
FDS~1~9=0xf,0x7,1:32,768 (34 seconds)
FDS~1~10=0xf,0x6,1:8,192 (8.5 seconds)
FDS~1~11=0xf,0x5,1:2,048 (2.1 seconds)
FDS~1~12=0xf,0x4,1:512 (528 ms)
FDS~1~13=0xf,0x3,1:128 (132 ms)
FDS~1~14=0xf,0x2,1:32 (33 ms)
FDS~1~15=0xf,0x1,1:8 (8.3 ms)
FDS~1~16=0xf,0x0,1:2 (2.1 ms)

FDS~2~1=0x10,0x10,DSWDT uses LPRC as reference clock
FDS~2~2=0x10,0x0,DSWDT uses SOSC as reference clock

FDS~3~1=0x20,0x20,RTCC uses SOSC as reference clock
FDS~3~2=0x20,0x0,RTCC uses LPRC as reference clock

FDS~4~1=0x40,0x40,Zero-Power BOR enabled in Deep Sleep
FDS~4~2=0x40,0x0,Zero-Power BOR disabled in Deep Sleep (does not affect operation in non Deep Sleep modes)

FDS~5~1=0x80,0x80,DSWDT enabled
FDS~5~2=0x80,0x0,DSWDT disabled

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24F16KA101]

pgmmem=0x0
~pgmmem=0x2bff
cfgmem=0xf80000
~cfgmem=0xf80011
userid=
~userid=
eedata=0x7ffe00
~eedata=0x7fffff
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xd010000

configslots=18
0xf80000=FBS
0xf80001=
0xf80002=
0xf80003=
0xf80004=FGS
0xf80005=
0xf80006=FOSCSEL
0xf80007=
0xf80008=FOSC
0xf80009=
0xf8000a=FWDT
0xf8000b=
0xf8000c=FPOR
0xf8000d=
0xf8000e=FICD
0xf8000f=
0xf80010=FDS
0xf80011=

FBS_unused=0x0
FBS~1=BWRP,0x1,Table Write Protect Boot
FBS~2=BSS,0xe,Boot segment Protect

FBS~1~1=0x1,0x1,Disabled
FBS~1~2=0x1,0x0,Enabled

FBS~2~1=0xe,0xe,Disabled
FBS~2~2=0xe,0xc,Standard Security Boot Protect 000000-000AFE
FBS~2~3=0xe,0xa,Standard Security Boot Protect 000000-002BFE
FBS~2~4=0xe,0x4,High Security Boot Protect 000000-000AFE
FBS~2~5=0xe,0x2,High Security Boot Protect 000000-002BFE

FGS_unused=0x0
FGS~1=GWRP,0x1,General Segment Write Protect
FGS~2=GSS,0x2,Standard Security General Segment

FGS~1~1=0x1,0x1,Disabled
FGS~1~2=0x1,0x0,Enabled

FGS~2~1=0x2,0x2,Disabled
FGS~2~2=0x2,0x0,Enabled

FOSCSEL_unused=0x0
FOSCSEL~1=FNOSC,0x7,Oscillator Select
FOSCSEL~2=IES0,0x80,Internal External Switch Over bit

FOSCSEL~1~1=0x7,0x0,Fast RC Oscillator (FRC)
FOSCSEL~1~2=0x7,0x1,Fast RC Oscillator with divide-by-N with PLL Module (FRCDIV+PLL)
FOSCSEL~1~3=0x7,0x2,Primary Oscillator (MS, HS, EC)
FOSCSEL~1~4=0x7,0x3,Primary Oscillator with PLL Module (MS+PLL, HS+PLL, EC+PLL)
FOSCSEL~1~5=0x7,0x4,Secondary Oscillator (SOSC)
FOSCSEL~1~6=0x7,0x5,Low Power RC Oscillator (LPRC)
FOSCSEL~1~7=0x7,0x7,Fast RC Oscillator with divide-by-N (FRCDIV)
FOSCSEL~1~8=0x7,0x6,Low-Power FRC oscillator with divide-by-N (LPFRCDIV)

FOSCSEL~2~1=0x80,0x80,Internal External Switch Over mode enabled (Two-Speed Start-up enabled)
FOSCSEL~2~2=0x80,0x0,Internal External Switch Over mode disabled (Two-Speed Start-up disabled)

FOSC_unused=0x0
FOSC~1=POSCMD,0x3,Primary Oscillator Configuration bits
FOSC~2=OSCIOFNC,0x4,CLKO Enable Configuration bit
FOSC~3=POSCFREQ,0x18,Primary Oscillator Frequency Range Configuration bits
FOSC~4=SOSCSEL,0x20,SOSC Power Selection Configuration bits
FOSC~5=FCKSM,0xc0,Clock Switching and Monitor Selection

FOSC~1~1=0x3,0x3,Primary oscillator disabled
FOSC~1~2=0x3,0x2,HS oscillator mode selected (4 MHz - 25 MHz)
FOSC~1~3=0x3,0x1,XT oscillator mode selected (100 kHz - 4 MHz)
FOSC~1~4=0x3,0x0,External clock mode selected

FOSC~2~1=0x4,0x4,CLKO output signal active on the OSCO pin
FOSC~2~2=0x4,0x0,CLKO output disabled

FOSC~3~1=0x18,0x18,Primary oscillator / External Clock input frequency greater than 8 MHz
FOSC~3~2=0x18,0x10,Primary oscillator / External Clock input frequency between 100 kHz and 8 MHz
FOSC~3~3=0x18,0x8,Primary oscillator / External Clock input frequency less than 100 kHz

FOSC~4~1=0x20,0x20,High Power SOSC circuit selected
FOSC~4~2=0x20,0x0,Low Power SOSC circuit selected

FOSC~5~1=0x80,0x80,Clock switching is disabled, fail safe clock monitor is disabled
FOSC~5~2=0xc0,0x40,Clock switching is enabled, fail safe clock monitor is disabled
FOSC~5~3=0xc0,0x0,Clock switching is enabled, fail safe clock monitor is disabled

FWDT_unused=0x0
FWDT~1=WDTPS,0xf,Watchdog Timer Postscale Select bits
FWDT~2=FWPSA0,0x10,WDT Prescaler
FWDT~3=WINDIS,0x40,Windowed Watchdog Timer Disable bit
FWDT~4=FWDTEN,0x80,Watchdog Timer Enable bit

FWDT~1~1=0xf,0xf,1:32,768
FWDT~1~2=0xf,0xe,1:16,384
FWDT~1~3=0xf,0xd,1:8,192
FWDT~1~4=0xf,0xc,1:4,096
FWDT~1~5=0xf,0xb,1:2,048
FWDT~1~6=0xf,0xa,1:1,024
FWDT~1~7=0xf,0x9,1:512
FWDT~1~8=0xf,0x8,1:256
FWDT~1~9=0xf,0x7,1:128
FWDT~1~10=0xf,0x6,1:64
FWDT~1~11=0xf,0x5,1:32
FWDT~1~12=0xf,0x4,1:16
FWDT~1~13=0xf,0x3,1:8
FWDT~1~14=0xf,0x2,1:4
FWDT~1~15=0xf,0x1,1:2
FWDT~1~16=0xf,0x0,1:1

FWDT~2~1=0x10,0x10,WDT prescaler ratio of 1:128
FWDT~2~2=0x10,0x0,WDT prescaler ratio of 1:32

FWDT~3~1=0x40,0x40,Standard WDT selected; windowed WDT disabled
FWDT~3~2=0x40,0x0,Windowed WDT enabled

FWDT~4~1=0x80,0x80,WDT enabled
FWDT~4~2=0x80,0x0,WDT disabled (control is placed on the SWDTEN bit)

FPOR_unused=0x0
FPOR~1=BOREN,0x3,Brown-out Reset Enable bits
FPOR~2=PWRTEN,0x8,Power-up Timer Enable bit
FPOR~3=AI2C1,0x10,Alternate I2C1 Pin Mapping bit
FPOR~4=BORV,0x60,Brown-out Reset Voltage bits
FPOR~5=MCLRE,0x80,MCLR Pin Enable bit

FPOR~1~1=0x3,0x3,Brown-out Reset enabled in hardware; SBOREN bit disabled
FPOR~1~2=0x3,0x2,Brown-out Reset enabled only while device active and disabled in SLEEP; SBOREN bit disabled
FPOR~1~3=0x3,0x1,Brown-out Reset controlled with the SBOREN bit setting
FPOR~1~4=0x3,0x0,Brown-out Reset disabled in hardware; SBOREN bit disabled

FPOR~2~1=0x8,0x0,PWRT disabled
FPOR~2~2=0x8,0x8,PWRT enabled

FPOR~3~1=0x10,0x10,Default location for SCL1/SDA1 pins
FPOR~3~2=0x10,0x0,Alternate location for SCL1/SDA1 pins

FPOR~4~1=0x60,0x60,VBOR set to 1.8 V min
FPOR~4~2=0x60,0x40,VBOR set to 2.7 V min
FPOR~4~3=0x60,0x20,VBOR set to 3.0 V min
FPOR~4~4=0x60,0x0,Downside protection on POR enabled

FPOR~5~1=0x80,0x80,MCLR pin enabled; RA5 input pin disabled
FPOR~5~2=0x80,0x0,RA5 input pin enabled; MCLR disabled

FICD_unused=0x0
FICD~1=ICS,0x3,ICD Pin Placement Select bits
FICD~2=COE,0x40,Set Clip On Emulation bit
FICD~3=BACKBUG,0x80,Background Debugger Enable bit

FICD~1~1=0x3,0x3,ICD EMUC/EMUD pins are shared with PGEC1/PGED1
FICD~1~2=0x3,0x2,ICD EMUC/EMUD pins are shared with PGEC2/PGED2
FICD~1~3=0x3,0x1,ICD EMUC/EMUD pins are shared with PGEC3/PGED3

FICD~2~1=0x40,0x40,Device will reset into Operational Mode
FICD~2~2=0x40,0x0,Device will reset into Clip On Emulation Mode

FICD~3~1=0x80,0x80,Background debugger disabled
FICD~3~2=0x80,0x0,Background debugger functions enabled

FDS_unused=0x0
FDS~1=DSWDTPS,0xf,Deep Sleep Watchdog Timer Postscale Select bits
FDS~2=DSWDTLPRC,0x10,DSWDT Reference Clock Select bit
FDS~3=RTCSOSC,0x20,RTCC Reference Clock Select bit
FDS~4=DSZPBOR,0x40,Deep Sleep Zero-Power BOR Enable bit
FDS~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer Enable bit

FDS~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
FDS~1~2=0xf,0xe,1:536,870,912 (6.4 days)
FDS~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
FDS~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
FDS~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
FDS~1~6=0xf,0xa,1:2,097,152 (36 minutes)
FDS~1~7=0xf,0x9,1:524,288 (9 minutes)
FDS~1~8=0xf,0x8,1:131,072 (135 seconds)
FDS~1~9=0xf,0x7,1:32,768 (34 seconds)
FDS~1~10=0xf,0x6,1:8,192 (8.5 seconds)
FDS~1~11=0xf,0x5,1:2,048 (2.1 seconds)
FDS~1~12=0xf,0x4,1:512 (528 ms)
FDS~1~13=0xf,0x3,1:128 (132 ms)
FDS~1~14=0xf,0x2,1:32 (33 ms)
FDS~1~15=0xf,0x1,1:8 (8.3 ms)
FDS~1~16=0xf,0x0,1:2 (2.1 ms)

FDS~2~1=0x10,0x10,DSWDT uses LPRC as reference clock
FDS~2~2=0x10,0x0,DSWDT uses SOSC as reference clock

FDS~3~1=0x20,0x20,RTCC uses SOSC as reference clock
FDS~3~2=0x20,0x0,RTCC uses LPRC as reference clock

FDS~4~1=0x40,0x40,Zero-Power BOR enabled in Deep Sleep
FDS~4~2=0x40,0x0,Zero-Power BOR disabled in Deep Sleep (does not affect operation in non Deep Sleep modes)

FDS~5~1=0x80,0x80,DSWDT enabled
FDS~5~2=0x80,0x0,DSWDT disabled

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24F16KA102]

pgmmem=0x0
~pgmmem=0x2bff
cfgmem=0xf80000
~cfgmem=0xf80011
userid=
~userid=
eedata=0x7ffe00
~eedata=0x7fffff
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xd030000

configslots=18
0xf80000=FBS
0xf80001=
0xf80002=
0xf80003=
0xf80004=FGS
0xf80005=
0xf80006=FOSCSEL
0xf80007=
0xf80008=FOSC
0xf80009=
0xf8000a=FWDT
0xf8000b=
0xf8000c=FPOR
0xf8000d=
0xf8000e=FICD
0xf8000f=
0xf80010=FDS
0xf80011=

FBS_unused=0x0
FBS~1=BWRP,0x1,Table Write Protect Boot
FBS~2=BSS,0xe,Boot segment Protect

FBS~1~1=0x1,0x1,Disabled
FBS~1~2=0x1,0x0,Enabled

FBS~2~1=0xe,0xe,Disabled
FBS~2~2=0xe,0xc,Standard Security Boot Protect 000000-000AFE
FBS~2~3=0xe,0xa,Standard Security Boot Protect 000000-002BFE
FBS~2~4=0xe,0x4,High Security Boot Protect 000000-000AFE
FBS~2~5=0xe,0x2,High Security Boot Protect 000000-002BFE

FGS_unused=0x0
FGS~1=GWRP,0x1,General Segment Write Protect
FGS~2=GSS,0x2,Standard Security General Segment

FGS~1~1=0x1,0x1,Disabled
FGS~1~2=0x1,0x0,Enabled

FGS~2~1=0x2,0x2,Disabled
FGS~2~2=0x2,0x0,Enabled

FOSCSEL_unused=0x0
FOSCSEL~1=FNOSC,0x7,Oscillator Select
FOSCSEL~2=IES0,0x80,Internal External Switch Over bit

FOSCSEL~1~1=0x7,0x0,Fast RC Oscillator (FRC)
FOSCSEL~1~2=0x7,0x1,Fast RC Oscillator with divide-by-N with PLL Module (FRCDIV+PLL)
FOSCSEL~1~3=0x7,0x2,Primary Oscillator (MS, HS, EC)
FOSCSEL~1~4=0x7,0x3,Primary Oscillator with PLL Module (MS+PLL, HS+PLL, EC+PLL)
FOSCSEL~1~5=0x7,0x4,Secondary Oscillator (SOSC)
FOSCSEL~1~6=0x7,0x5,Low Power RC Oscillator (LPRC)
FOSCSEL~1~7=0x7,0x6,Low-Power FRC oscillator with divide-by-N (LPFRCDIV)
FOSCSEL~1~8=0x7,0x7,FRC Oscillator with divide-by-N (FRCDIV)

FOSCSEL~2~1=0x80,0x80,Internal External Switch Over mode enabled (Two-Speed Start-up enabled)
FOSCSEL~2~2=0x80,0x0,Internal External Switch Over mode disabled (Two-Speed Start-up disabled)

FOSC_unused=0x0
FOSC~1=POSCMD,0x3,Primary Oscillator Configuration bits
FOSC~2=OSCIOFNC,0x4,CLKO Enable Configuration bit
FOSC~3=POSCFREQ,0x18,Primary Oscillator Frequency Range Configuration bits
FOSC~4=SOSCSEL,0x20,SOSC Power Selection Configuration bits
FOSC~5=FCKSM,0xc0,Clock Switching and Monitor Selection

FOSC~1~1=0x3,0x3,Primary oscillator disabled
FOSC~1~2=0x3,0x2,HS oscillator mode selected (4 MHz - 25 MHz)
FOSC~1~3=0x3,0x1,XT oscillator mode selected (100 kHz - 4 MHz)
FOSC~1~4=0x3,0x0,External clock mode selected

FOSC~2~1=0x4,0x4,CLKO output signal active on the OSCO pin
FOSC~2~2=0x4,0x0,CLKO output disabled

FOSC~3~1=0x18,0x18,Primary oscillator / External Clock input frequency greater than 8 MHz
FOSC~3~2=0x18,0x10,Primary oscillator / External Clock input frequency between 100 kHz and 8 MHz
FOSC~3~3=0x18,0x8,Primary oscillator / External Clock input frequency less than 100 kHz

FOSC~4~1=0x20,0x20,High Power SOSC circuit selected
FOSC~4~2=0x20,0x0,Low Power SOSC circuit selected

FOSC~5~1=0x80,0x80,Clock switching is disabled, fail safe clock monitor is disabled
FOSC~5~2=0xc0,0x40,Clock switching is enabled, fail safe clock monitor is disabled
FOSC~5~3=0xc0,0x0,Clock switching is enabled, fail safe clock monitor is disabled

FWDT_unused=0x0
FWDT~1=WDTPS,0xf,Watchdog Timer Postscale Select bits
FWDT~2=FWPSA0,0x10,WDT Prescaler
FWDT~3=WINDIS,0x40,Windowed Watchdog Timer Disable bit
FWDT~4=FWDTEN,0x80,Watchdog Timer Enable bit

FWDT~1~1=0xf,0xf,1:32,768
FWDT~1~2=0xf,0xe,1:16,384
FWDT~1~3=0xf,0xd,1:8,192
FWDT~1~4=0xf,0xc,1:4,096
FWDT~1~5=0xf,0xb,1:2,048
FWDT~1~6=0xf,0xa,1:1,024
FWDT~1~7=0xf,0x9,1:512
FWDT~1~8=0xf,0x8,1:256
FWDT~1~9=0xf,0x7,1:128
FWDT~1~10=0xf,0x6,1:64
FWDT~1~11=0xf,0x5,1:32
FWDT~1~12=0xf,0x4,1:16
FWDT~1~13=0xf,0x3,1:8
FWDT~1~14=0xf,0x2,1:4
FWDT~1~15=0xf,0x1,1:2
FWDT~1~16=0xf,0x0,1:1

FWDT~2~1=0x10,0x10,WDT prescaler ratio of 1:128
FWDT~2~2=0x10,0x0,WDT prescaler ratio of 1:32

FWDT~3~1=0x40,0x40,Standard WDT selected; windowed WDT disabled
FWDT~3~2=0x40,0x0,Windowed WDT enabled

FWDT~4~1=0x80,0x80,WDT enabled
FWDT~4~2=0x80,0x0,WDT disabled (control is placed on the SWDTEN bit)

FPOR_unused=0x0
FPOR~1=BOREN,0x3,Brown-out Reset Enable bits
FPOR~2=PWRTEN,0x8,Power-up Timer Enable bit
FPOR~3=AI2C1,0x10,Alternate I2C1 Pin Mapping bit
FPOR~4=BORV,0x60,Brown-out Reset Voltage bits
FPOR~5=MCLRE,0x80,MCLR Pin Enable bit

FPOR~1~1=0x3,0x3,Brown-out Reset enabled in hardware; SBOREN bit disabled
FPOR~1~2=0x3,0x2,Brown-out Reset enabled only while device active and disabled in SLEEP; SBOREN bit disabled
FPOR~1~3=0x3,0x1,Brown-out Reset controlled with the SBOREN bit setting
FPOR~1~4=0x3,0x0,Brown-out Reset disabled in hardware; SBOREN bit disabled

FPOR~2~1=0x8,0x0,PWRT disabled
FPOR~2~2=0x8,0x8,PWRT enabled

FPOR~3~1=0x10,0x10,Default location for SCL1/SDA1 pins
FPOR~3~2=0x10,0x0,Alternate location for SCL1/SDA1 pins

FPOR~4~1=0x60,0x60,VBOR set to 1.8 V min
FPOR~4~2=0x60,0x40,VBOR set to 2.7 V min
FPOR~4~3=0x60,0x20,VBOR set to 3.0 V min
FPOR~4~4=0x60,0x0,Downside protection on POR enabled

FPOR~5~1=0x80,0x80,MCLR pin enabled; RA5 input pin disabled
FPOR~5~2=0x80,0x0,RA5 input pin enabled; MCLR disabled

FICD_unused=0x0
FICD~1=ICS,0x3,ICD Pin Placement Select bits
FICD~2=COE,0x40,Set Clip On Emulation bit
FICD~3=BACKBUG,0x80,Background Debugger Enable bit

FICD~1~1=0x3,0x3,ICD EMUC/EMUD pins are shared with PGEC1/PGED1
FICD~1~2=0x3,0x2,ICD EMUC/EMUD pins are shared with PGEC2/PGED2
FICD~1~3=0x3,0x1,ICD EMUC/EMUD pins are shared with PGEC3/PGED3

FICD~2~1=0x40,0x40,Device will reset into Operational Mode
FICD~2~2=0x40,0x0,Device will reset into Clip On Emulation Mode

FICD~3~1=0x80,0x80,Background debugger disabled
FICD~3~2=0x80,0x0,Background debugger functions enabled

FDS_unused=0x0
FDS~1=DSWDTPS,0xf,Deep Sleep Watchdog Timer Postscale Select bits
FDS~2=DSWDTLPRC,0x10,DSWDT Reference Clock Select bit
FDS~3=RTCSOSC,0x20,RTCC Reference Clock Select bit
FDS~4=DSZPBOR,0x40,Deep Sleep Zero-Power BOR Enable bit
FDS~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer Enable bit

FDS~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
FDS~1~2=0xf,0xe,1:536,870,912 (6.4 days)
FDS~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
FDS~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
FDS~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
FDS~1~6=0xf,0xa,1:2,097,152 (36 minutes)
FDS~1~7=0xf,0x9,1:524,288 (9 minutes)
FDS~1~8=0xf,0x8,1:131,072 (135 seconds)
FDS~1~9=0xf,0x7,1:32,768 (34 seconds)
FDS~1~10=0xf,0x6,1:8,192 (8.5 seconds)
FDS~1~11=0xf,0x5,1:2,048 (2.1 seconds)
FDS~1~12=0xf,0x4,1:512 (528 ms)
FDS~1~13=0xf,0x3,1:128 (132 ms)
FDS~1~14=0xf,0x2,1:32 (33 ms)
FDS~1~15=0xf,0x1,1:8 (8.3 ms)
FDS~1~16=0xf,0x0,1:2 (2.1 ms)

FDS~2~1=0x10,0x10,DSWDT uses LPRC as reference clock
FDS~2~2=0x10,0x0,DSWDT uses SOSC as reference clock

FDS~3~1=0x20,0x20,RTCC uses SOSC as reference clock
FDS~3~2=0x20,0x0,RTCC uses LPRC as reference clock

FDS~4~1=0x40,0x40,Zero-Power BOR enabled in Deep Sleep
FDS~4~2=0x40,0x0,Zero-Power BOR disabled in Deep Sleep (does not affect operation in non Deep Sleep modes)

FDS~5~1=0x80,0x80,DSWDT enabled
FDS~5~2=0x80,0x0,DSWDT disabled

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24F32KA101]

pgmmem=0x0
~pgmmem=0x57fb
cfgmem=0x57fc
~cfgmem=0x57ff
userid=
~userid=
eedata=0x7ffe00
~eedata=0x7fffff
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xb090000

configslots=4
0x57fc=LASTWORD
0x57fd=
0x57fe=LASTWORDMINUSONE
0x57ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x7808,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x7808,0x7808,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~8~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24F32KA102]

pgmmem=0x0
~pgmmem=0x57fb
cfgmem=0xf80000
~cfgmem=0xf80011
userid=
~userid=
eedata=0x7ffe00
~eedata=0x7fffff
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0xb0b0000

configslots=18
0xf80000=FBS
0xf80001=
0xf80002=
0xf80003=
0xf80004=FGS
0xf80005=
0xf80006=FOSCSEL
0xf80007=
0xf80008=FOSC
0xf80009=
0xf8000a=FWDT
0xf8000b=
0xf8000c=FPOR
0xf8000d=
0xf8000e=FICD
0xf8000f=
0xf80010=FDS
0xf80011=

FBS_unused=0x0
FBS~1=BWRP,0x1,Boot Segment Write Protect
FBS~2=BSS,0xe,Boot Segment Program Flash Code Protection

FBS~1~1=0x1,0x1,Boot Segment may be written
FBS~1~2=0x1,0x0,Boot Segment is write protected

FBS~2~1=0xe,0xe,No Boot Segment
FBS~2~2=0xe,0xc,Small-sized Boot Flash
FBS~2~3=0xe,0xa,Medium-sized Boot Flash
FBS~2~4=0xe,0x8,Large-sized Boot Flash

FGS_unused=0x0
FGS~1=GWRP,0x1,General Code Segment Write Protect
FGS~2=GSS,0x2,General Segment Code Protection

FGS~1~1=0x1,0x1,General Segment may be written
FGS~1~2=0x1,0x0,General Segment is write protected

FGS~2~1=0x2,0x2,Disabled
FGS~2~2=0x2,0x0,Enabled

FOSCSEL_unused=0x0
FOSCSEL~1=FNOSC,0x7,Oscillator Mode
FOSCSEL~2=IESO,0x80,Two-speed Oscillator Start-Up Enable

FOSCSEL~1~1=0x7,0x7,Internal Fast RC (FRC)with postscaler
FOSCSEL~1~2=0x7,0x6,Reserved
FOSCSEL~1~3=0x7,0x5,Low Power RC Oscillator (LPRC)
FOSCSEL~1~4=0x7,0x4,Secondary Oscillator (SOSC)
FOSCSEL~1~5=0x7,0x3,Primary Oscillator (MS, HS, EC) w/ PLL
FOSCSEL~1~6=0x7,0x2,Primary Oscillator (MS, HS, EC)
FOSCSEL~1~7=0x7,0x1,Internal Fast RC (FRC) w/ PLL
FOSCSEL~1~8=0x7,0x0,Internal Fast RC (FRC)

FOSCSEL~2~1=0x80,0x80,Start up with FRC, then switch
FOSCSEL~2~2=0x80,0x0,Start up with user-selected oscillator

FOSC_unused=0x0
FOSC~1=POSCMD,0x3,Primary Oscillator Source
FOSC~2=OSCIOFNC,0x4,OSCO/OSC2 Pin Function
FOSC~3=POSCFREQ,0x18,Primary Osc. Range
FOSC~4=FCKSM,0xc0,Clock Switching and Monitor

FOSC~1~1=0x3,0x3,Primary Oscillator Disabled
FOSC~1~2=0x3,0x2,HS Oscillator Mode
FOSC~1~3=0x3,0x1,XT Oscillator Mode
FOSC~1~4=0x3,0x0,EC Oscillator Mode

FOSC~2~1=0x4,0x4,OSCO pin has clock out function
FOSC~2~2=0x4,0x0,OSCO pin has digital I/O function

FOSC~3~1=0x18,0x18,Frequency >8Mhz
FOSC~3~2=0x18,0x10,Frequency 100khz to 8Mhz
FOSC~3~3=0x18,0x8,Frequency <100khz
FOSC~3~4=0x18,0x0,Reserved

FOSC~4~1=0xc0,0xc0, Sw Enabled, Mon Disabled
FOSC~4~2=0xc0,0x80, Sw Disabled, Mon Disabled
FOSC~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

FWDT_unused=0x0
FWDT~1=WDTPS,0xf,Watchdog Timer Postscaler
FWDT~2=FWPSA0,0x10,WDT Prescaler
FWDT~3=WINDIS,0x40,Watchdog Timer Window
FWDT~4=FWDTEN,0x80,Watchdog Timer Enable

FWDT~1~1=0xf,0xf,1:32,768
FWDT~1~2=0xf,0xe,1:16,384
FWDT~1~3=0xf,0xd,1:8,192
FWDT~1~4=0xf,0xc,1:4,096
FWDT~1~5=0xf,0xb,1:2,048
FWDT~1~6=0xf,0xa,1:1,024
FWDT~1~7=0xf,0x9,1:512
FWDT~1~8=0xf,0x8,1:256
FWDT~1~9=0xf,0x7,1:128
FWDT~1~10=0xf,0x6,1:64
FWDT~1~11=0xf,0x5,1:32
FWDT~1~12=0xf,0x4,1:16
FWDT~1~13=0xf,0x3,1:8
FWDT~1~14=0xf,0x2,1:4
FWDT~1~15=0xf,0x1,1:2
FWDT~1~16=0xf,0x0,1:1

FWDT~2~1=0x10,0x10,1:128
FWDT~2~2=0x10,0x0,1:32

FWDT~3~1=0x40,0x40,Non-Window mode
FWDT~3~2=0x40,0x0,Window mode

FWDT~4~1=0x80,0x80,Enable
FWDT~4~2=0x80,0x0,Disable

FPOR_unused=0x0
FPOR~1=BOREN,0x3,Brown-out Enable Bits
FPOR~2=PWRTEN,0x8,Power-up Timer Enabled
FPOR~3=AI2C1,0x10,Alternate I2C1 Pin Mapping
FPOR~4=BORV,0x60,Brown-out Reset Voltage
FPOR~5=MCLRE,0x80,nMCLR Pin Enable

FPOR~1~1=0x3,0x3,Enabled in HW, SBOREN disabled
FPOR~1~2=0x3,0x2,Enabled in HW, disabled SLEEP, SBOREN disabled
FPOR~1~3=0x3,0x1,Controlled with SBOREN
FPOR~1~4=0x3,0x0,Disabled in HW, SBOREN disabled

FPOR~2~1=0x8,0x8,PWRT disabled
FPOR~2~2=0x8,0x0,PWRT enabled

FPOR~3~1=0x10,0x10,Alternate location for SCL1/SDA1
FPOR~3~2=0x10,0x0,Default location for SCL1/SDA1

FPOR~4~1=0x60,0x60,1.8V
FPOR~4~2=0x60,0x40,2.7V
FPOR~4~3=0x60,0x20,3.0V
FPOR~4~4=0x60,0x0,Downside protection

FPOR~5~1=0x80,0x80,nMCLR Enabled, RA5 disabled
FPOR~5~2=0x80,0x0,RA5 enabled, nMCLR disabled

FICD_unused=0x0
FICD~1=ICS,0x3,Comm Channel Select
FICD~2=COE,0x40,Set Clip On Emulation Mode
FICD~3=BACKBUG,0x80,Background Debug

FICD~1~1=0x3,0x3,Use PGC1/EMUC1 and PGD1/EMUD1
FICD~1~2=0x3,0x2,Use PGC2/EMUC2 and PGD2/EMUD2
FICD~1~3=0x3,0x1,Use PGC3/EMUC3 and PGD3/EMUD3

FICD~2~1=0x40,0x40,Reset Into Operational Mode
FICD~2~2=0x40,0x0,Reset Into Clip On Emulation Mode

FICD~3~1=0x80,0x80,Disabled
FICD~3~2=0x80,0x0,Enabled

FDS_unused=0x0
FDS~1=DSWDTPS,0xf,Deep Sleep Watchdog Timer Postscale
FDS~2=DSWDRLPRC,0x10,DSWDT Reference Clock Select
FDS~3=RTCSPSC,0x20,RTCC Reference Clock Select
FDS~4=DSZPBOR,0x40,Deep Sleep Zero Power BOR Enable
FDS~5=FWDTEN,0x80,Deep Sleep Watchdog Timer Enable

FDS~1~1=0xf,0xf,25.7 days
FDS~1~2=0xf,0xe,6.4 days
FDS~1~3=0xf,0xd,38.5 days
FDS~1~4=0xf,0xc,9.6 hours
FDS~1~5=0xf,0xb,2.4 hours
FDS~1~6=0xf,0xa,36 minutes
FDS~1~7=0xf,0x9,9 minutes
FDS~1~8=0xf,0x8,135 seconds
FDS~1~9=0xf,0x7,34 seconds
FDS~1~10=0xf,0x6,8.5 seconds
FDS~1~11=0xf,0x5,2.1 seconds
FDS~1~12=0xf,0x4,528 ms
FDS~1~13=0xf,0x3,132 ms
FDS~1~14=0xf,0x2,33 ms
FDS~1~15=0xf,0x1,8.3 ms
FDS~1~16=0xf,0x0,2.1 ms

FDS~2~1=0x10,0x10,DSWDT uses LPRC
FDS~2~2=0x10,0x0,DSWDT uses SOSC

FDS~3~1=0x20,0x20,RTCC uses SOSC
FDS~3~2=0x20,0x0,RTCC uses LPRC

FDS~4~1=0x40,0x40,Zero-Power BOR enabled
FDS~4~2=0x40,0x0,Zero-Power BOR disable

FDS~5~1=0x80,0x80,DSWDT Enable
FDS~5~2=0x80,0x0,DSWDT Disable

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128DA106]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157fd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x157f8=CONFIG3
0x157f9=
0x157fa=CONFIG2
0x157fb=
0x157fc=CONFIG1
0x157fd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128DA110]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157fd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x157f8=CONFIG3
0x157f9=
0x157fa=CONFIG2
0x157fb=
0x157fc=CONFIG1
0x157fd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128DA206]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157fd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x157f8=CONFIG3
0x157f9=
0x157fa=CONFIG2
0x157fb=
0x157fc=CONFIG1
0x157fd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128DA210]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157fd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x157f8=CONFIG3
0x157f9=
0x157fa=CONFIG2
0x157fb=
0x157fc=CONFIG1
0x157fd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GA006]

pgmmem=0x0
~pgmmem=0x157fb
cfgmem=0x157fc
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4070000

configslots=4
0x157fc=LASTWORD
0x157fd=
0x157fe=LASTWORDMINUSONE
0x157ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GA008]

pgmmem=0x0
~pgmmem=0x157fb
cfgmem=0x157fc
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x40a0000

configslots=4
0x157fc=LASTWORD
0x157fd=
0x157fe=LASTWORDMINUSONE
0x157ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GA010]

pgmmem=0x0
~pgmmem=0x157fb
cfgmem=0x157fc
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x40d0000

configslots=4
0x157fc=LASTWORD
0x157fd=
0x157fe=LASTWORDMINUSONE
0x157ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x00,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x00,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x000,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0000,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GA106]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10080000

configslots=8
0x157f8=
0x157f9=
0x157fa=LASTWORDMINUSTWO
0x157fb=
0x157fc=LASTWORDMINUSONE
0x157fd=
0x157fe=LASTWORD
0x157ff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES1,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES0,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GA108]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x100a0000

configslots=8
0x157f8=
0x157f9=
0x157fa=LASTWORDMINUSTWO
0x157fb=
0x157fc=LASTWORDMINUSONE
0x157fd=
0x157fe=LASTWORD
0x157ff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES1,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GA110]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x100e0000

configslots=8
0x157f8=
0x157f9=
0x157fa=LASTWORDMINUSTWO
0x157fb=
0x157fc=LASTWORDMINUSONE
0x157fd=
0x157fe=LASTWORD
0x157ff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES1,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GB106]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10090000

configslots=8
0x157f8=
0x157f9=
0x157fa=LASTWORDMINUSTWO
0x157fb=
0x157fc=LASTWORDMINUSONE
0x157fd=
0x157fe=LASTWORD
0x157ff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GB108]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x100b0000

configslots=8
0x157f8=
0x157f9=
0x157fa=LASTWORDMINUSTWO
0x157fb=
0x157fc=LASTWORDMINUSONE
0x157fd=
0x157fe=LASTWORD
0x157ff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GB110]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x100f0000

configslots=8
0x157f8=
0x157f9=
0x157fa=LASTWORDMINUSTWO
0x157fb=
0x157fc=LASTWORDMINUSONE
0x157fd=
0x157fe=LASTWORD
0x157ff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GB206]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157fd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x157f8=CONFIG3
0x157f9=
0x157fa=CONFIG2
0x157fb=
0x157fc=CONFIG1
0x157fd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ128GB210]

pgmmem=0x0
~pgmmem=0x157f7
cfgmem=0x157f8
~cfgmem=0x157fd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x157f8=CONFIG3
0x157f9=
0x157fa=CONFIG2
0x157fb=
0x157fc=CONFIG1
0x157fd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ16GA002]

pgmmem=0x0
~pgmmem=0x2bfb
cfgmem=0x2bfc
~cfgmem=0x2bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4440000

configslots=4
0x2bfc=LASTWORD
0x2bfd=
0x2bfe=LASTWORDMINUSONE
0x2bff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ16GA004]

pgmmem=0x0
~pgmmem=0x2bfb
cfgmem=0x2bfc
~cfgmem=0x2bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x44c0000

configslots=4
0x2bfc=LASTWORD
0x2bfd=
0x2bfe=LASTWORDMINUSONE
0x2bff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ192GA106]

pgmmem=0x0
~pgmmem=0x20bf7
cfgmem=0x20bf8
~cfgmem=0x20bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10100000

configslots=8
0x20bf8=
0x20bf9=
0x20bfa=LASTWORDMINUSTWO
0x20bfb=
0x20bfc=LASTWORDMINUSONE
0x20bfd=
0x20bfe=LASTWORD
0x20bff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES1,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES0,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ192GA108]

pgmmem=0x0
~pgmmem=0x20bf7
cfgmem=0x20bf8
~cfgmem=0x20bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10120000

configslots=8
0x20bf8=
0x20bf9=
0x20bfa=LASTWORDMINUSTWO
0x20bfb=
0x20bfc=LASTWORDMINUSONE
0x20bfd=
0x20bfe=LASTWORD
0x20bff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES1,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ192GA110]

pgmmem=0x0
~pgmmem=0x20bf7
cfgmem=0x20bf8
~cfgmem=0x20bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10160000

configslots=8
0x20bf8=
0x20bf9=
0x20bfa=LASTWORDMINUSTWO
0x20bfb=
0x20bfc=LASTWORDMINUSONE
0x20bfd=
0x20bfe=LASTWORD
0x20bff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES1,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ192GB106]

pgmmem=0x0
~pgmmem=0x20bf7
cfgmem=0x20bf8
~cfgmem=0x20bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10110000

configslots=8
0x20bf8=
0x20bf9=
0x20bfa=LASTWORDMINUSTWO
0x20bfb=
0x20bfc=LASTWORDMINUSONE
0x20bfd=
0x20bfe=LASTWORD
0x20bff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ192GB108]

pgmmem=0x0
~pgmmem=0x20bf7
cfgmem=0x20bf8
~cfgmem=0x20bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10130000

configslots=8
0x20bf8=
0x20bf9=
0x20bfa=LASTWORDMINUSTWO
0x20bfb=
0x20bfc=LASTWORDMINUSONE
0x20bfd=
0x20bfe=LASTWORD
0x20bff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ192GB110]

pgmmem=0x0
~pgmmem=0x20bf7
cfgmem=0x20bf8
~cfgmem=0x20bff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10170000

configslots=8
0x20bf8=
0x20bf9=
0x20bfa=LASTWORDMINUSTWO
0x20bfb=
0x20bfc=LASTWORDMINUSONE
0x20bfd=
0x20bfe=LASTWORD
0x20bff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256DA106]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abfd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x2abf8=CONFIG3
0x2abf9=
0x2abfa=CONFIG2
0x2abfb=
0x2abfc=CONFIG1
0x2abfd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256DA110]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abfd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x2abf8=CONFIG3
0x2abf9=
0x2abfa=CONFIG2
0x2abfb=
0x2abfc=CONFIG1
0x2abfd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256DA206]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abfd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x2abf8=CONFIG3
0x2abf9=
0x2abfa=CONFIG2
0x2abfb=
0x2abfc=CONFIG1
0x2abfd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256DA210]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abfd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x2abf8=CONFIG3
0x2abf9=
0x2abfa=CONFIG2
0x2abfb=
0x2abfc=CONFIG1
0x2abfd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GA106]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10180000

configslots=8
0x2abf8=
0x2abf9=
0x2abfa=LASTWORDMINUSTWO
0x2abfb=
0x2abfc=LASTWORDMINUSONE
0x2abfd=
0x2abfe=LASTWORD
0x2abff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES1,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GA108]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x101a0000

configslots=8
0x2abf8=
0x2abf9=
0x2abfa=LASTWORDMINUSTWO
0x2abfb=
0x2abfc=LASTWORDMINUSONE
0x2abfd=
0x2abfe=LASTWORD
0x2abff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES1,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GA110]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x101e0000

configslots=8
0x2abf8=
0x2abf9=
0x2abfa=LASTWORDMINUSTWO
0x2abfb=
0x2abfc=LASTWORDMINUSONE
0x2abfd=
0x2abfe=LASTWORD
0x2abff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=RES1,0x7000,Reserved
LASTWORDMINUSONE~9=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x7000,0x7000,Reserved

LASTWORDMINUSONE~9~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~9~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GB106]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10190000

configslots=8
0x2abf8=
0x2abf9=
0x2abfa=LASTWORDMINUSTWO
0x2abfb=
0x2abfc=LASTWORDMINUSONE
0x2abfd=
0x2abfe=LASTWORD
0x2abff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GB108]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x101b0000

configslots=8
0x2abf8=
0x2abf9=
0x2abfa=LASTWORDMINUSTWO
0x2abfb=
0x2abfc=LASTWORDMINUSONE
0x2abfd=
0x2abfe=LASTWORD
0x2abff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GB110]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x101f0000

configslots=8
0x2abf8=
0x2abf9=
0x2abfa=LASTWORDMINUSTWO
0x2abfb=
0x2abfc=LASTWORDMINUSONE
0x2abfd=
0x2abfe=LASTWORD
0x2abff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GB206]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abfd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x2abf8=CONFIG3
0x2abf9=
0x2abfa=CONFIG2
0x2abfb=
0x2abfc=CONFIG1
0x2abfd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ256GB210]

pgmmem=0x0
~pgmmem=0x2abf7
cfgmem=0x2abf8
~cfgmem=0x2abfd
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=6
0x2abf8=CONFIG3
0x2abf9=
0x2abfa=CONFIG2
0x2abfb=
0x2abfc=CONFIG1
0x2abfd=

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0xff,Write Protection Flash Page Segment Boundary
CONFIG3~2=SOSCSEL,0x300,Secondary Oscillator Power Mode Select
CONFIG3~3=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~4=ALTPMP,0x1000,Alternate PMP Pin Mapping
CONFIG3~5=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~6=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~7=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0xff,0x0,Page 0 (0x00)
CONFIG3~1~2=0xff,0x1,Page 1 (0x400)
CONFIG3~1~3=0xff,0x2,Page 2 (0x800)
CONFIG3~1~4=0xff,0x3,Page 3 (0xC00)
CONFIG3~1~5=0xff,0x4,Page 4 (0x1000)
CONFIG3~1~6=0xff,0x5,Page 5 (0x1400)
CONFIG3~1~7=0xff,0x6,Page 6 (0x1800)
CONFIG3~1~8=0xff,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0xff,0x8,Page 8 (0x2000)
CONFIG3~1~10=0xff,0x9,Page 9 (0x2400)
CONFIG3~1~11=0xff,0xa,Page 10 (0x2800)
CONFIG3~1~12=0xff,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0xff,0xc,Page 12 (0x3000)
CONFIG3~1~14=0xff,0xd,Page 13 (0x3400)
CONFIG3~1~15=0xff,0xe,Page 14 (0x3800)
CONFIG3~1~16=0xff,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0xff,0x10,Page 16 (0x4000)
CONFIG3~1~18=0xff,0x11,Page 17 (0x4200)
CONFIG3~1~19=0xff,0x12,Page 18 (0x4800)
CONFIG3~1~20=0xff,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0xff,0x14,Page 20 (0x5000)
CONFIG3~1~22=0xff,0x15,Page 21 (0x5400)
CONFIG3~1~23=0xff,0x16,Page 22 (0x5800)
CONFIG3~1~24=0xff,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0xff,0x18,Page 24 (0x6000)
CONFIG3~1~26=0xff,0x19,Page 25 (0x6400)
CONFIG3~1~27=0xff,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0xff,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0xff,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0xff,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0xff,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0xff,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0xff,0x20,Page 32 (0x8000)
CONFIG3~1~34=0xff,0x21,Page 33 (0x8400)
CONFIG3~1~35=0xff,0x22,Page 34 (0x8800)
CONFIG3~1~36=0xff,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0xff,0x24,Page 36 (0x9000)
CONFIG3~1~38=0xff,0x25,Page 37 (0x9400)
CONFIG3~1~39=0xff,0x26,Page 38 (0x9800)
CONFIG3~1~40=0xff,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0xff,0x28,Page 40 (0xA000)
CONFIG3~1~42=0xff,0x29,Page 41 (0xA400)
CONFIG3~1~43=0xff,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0xff,0x2b,Page 43 (0xAC00)
CONFIG3~1~45=0xff,0x2c,Page 44 (0xB000)
CONFIG3~1~46=0xff,0x2d,Page 45 (0xB400)
CONFIG3~1~47=0xff,0x2e,Page 46 (0xB800)
CONFIG3~1~48=0xff,0x2f,Page 47 (0xBC00)
CONFIG3~1~49=0xff,0x30,Page 48 (0xC000)
CONFIG3~1~50=0xff,0x31,Page 49 (0xC400)
CONFIG3~1~51=0xff,0x32,Page 50 (0xC800)
CONFIG3~1~52=0xff,0x33,Page 51 (0xCC00)
CONFIG3~1~53=0xff,0x34,Page 52 (0xD000)
CONFIG3~1~54=0xff,0x35,Page 53 (0xD400)
CONFIG3~1~55=0xff,0x36,Page 54 (0xD800)
CONFIG3~1~56=0xff,0x37,Page 55 (0xDC00)
CONFIG3~1~57=0xff,0x38,Page 56 (0xE000)
CONFIG3~1~58=0xff,0x39,Page 57 (0xE400)
CONFIG3~1~59=0xff,0x3a,Page 58 (0xE800)
CONFIG3~1~60=0xff,0x3b,Page 59 (0xEC00)
CONFIG3~1~61=0xff,0x3c,Page 60 (0xF000)
CONFIG3~1~62=0xff,0x3d,Page 61 (0xF400)
CONFIG3~1~63=0xff,0x3e,Page 62 (0xF800)
CONFIG3~1~64=0xff,0x3f,Page 63 (0xFC00)
CONFIG3~1~65=0xff,0x40,Page 64 (0xFF00)
CONFIG3~1~66=0xff,0x41,Page 65 (0x10000)
CONFIG3~1~67=0xff,0x42,Page 66 (0x10400)
CONFIG3~1~68=0xff,0x43,Page 67 (0x10800)
CONFIG3~1~69=0xff,0x44,Page 68 (0x10C00)
CONFIG3~1~70=0xff,0x45,Page 69 (0x20000)
CONFIG3~1~71=0xff,0x46,Page 70 (0x20400)
CONFIG3~1~72=0xff,0x47,Page 71 (0x20800)
CONFIG3~1~73=0xff,0x48,Page 72 (0x20C00)
CONFIG3~1~74=0xff,0x49,Page 73 (0x30000)
CONFIG3~1~75=0xff,0x4a,Page 74 (0x30400)
CONFIG3~1~76=0xff,0x4b,Page 75 (0x30800)
CONFIG3~1~77=0xff,0x4c,Page 76 (0x30C00)
CONFIG3~1~78=0xff,0x4d,Page 77 (0x40000)
CONFIG3~1~79=0xff,0x4e,Page 78 (0x40400)
CONFIG3~1~80=0xff,0x4f,Page 79 (0x40800)
CONFIG3~1~81=0xff,0x50,Page 80 (0x40C00)
CONFIG3~1~82=0xff,0x51,Page 81 (0x50000)
CONFIG3~1~83=0xff,0x52,Page 82 (0x50400)
CONFIG3~1~84=0xff,0x53,Page 83 (0x50800)
CONFIG3~1~85=0xff,0x54,Page 84 (0x50C00)
CONFIG3~1~86=0xff,0x55,Page 85 (0x60000)
CONFIG3~1~87=0xff,0x56,Page 86 (0x60400)
CONFIG3~1~88=0xff,0x57,Page 87 (0x60800)
CONFIG3~1~89=0xff,0x58,Page 88 (0x60C00)
CONFIG3~1~90=0xff,0x59,Page 89 (0x70000)
CONFIG3~1~91=0xff,0x5a,Page 90 (0x70400)
CONFIG3~1~92=0xff,0x5b,Page 91 (0x70800)
CONFIG3~1~93=0xff,0x5c,Page 92 (0x70C00)
CONFIG3~1~94=0xff,0x5d,Page 93 (0x80000)
CONFIG3~1~95=0xff,0x5e,Page 94 (0x80400)
CONFIG3~1~96=0xff,0x5f,Page 95 (0x80800)
CONFIG3~1~97=0xff,0x60,Page 96 (0x80C00)
CONFIG3~1~98=0xff,0x61,Page 97 (0x90000)
CONFIG3~1~99=0xff,0x62,Page 98 (0x90400)
CONFIG3~1~100=0xff,0x63,Page 99 (0x90800)
CONFIG3~1~101=0xff,0x64,Page 100 (0x90C00)
CONFIG3~1~102=0xff,0x65,Page 101 (0xA0000)
CONFIG3~1~103=0xff,0x66,Page 102 (0xA0400)
CONFIG3~1~104=0xff,0x67,Page 103 (0xA0C00)
CONFIG3~1~105=0xff,0x68,Page 104 (0xB0000)
CONFIG3~1~106=0xff,0x69,Page 105 (0xB0400)
CONFIG3~1~107=0xff,0x6a,Page 106 (0xB0800)
CONFIG3~1~108=0xff,0x6b,Page 107 (0xB0C00)
CONFIG3~1~109=0xff,0x6c,Page 108 (0xC0000)
CONFIG3~1~110=0xff,0x6d,Page 109 (0xC0400)
CONFIG3~1~111=0xff,0x6e,Page 110 (0xC0800)
CONFIG3~1~112=0xff,0x6f,Page 111 (0xC0C00)
CONFIG3~1~113=0xff,0x70,Page 112 (0xD0000)
CONFIG3~1~114=0xff,0x71,Page 113 (0xD0400)
CONFIG3~1~115=0xff,0x72,Page 114 (0xD0800)
CONFIG3~1~116=0xff,0x73,Page 115 (0xD0C00)
CONFIG3~1~117=0xff,0x74,Page 116 (0xE0000)
CONFIG3~1~118=0xff,0x75,Page 117 (0xE0400)
CONFIG3~1~119=0xff,0x76,Page 118 (0xE0800)
CONFIG3~1~120=0xff,0x77,Page 119 (0xE0C00)
CONFIG3~1~121=0xff,0x78,Page 120 (0xF0000)
CONFIG3~1~122=0xff,0x79,Page 121 (0xF0400)
CONFIG3~1~123=0xff,0x7a,Page 122 (0xF0800)
CONFIG3~1~124=0xff,0x7b,Page 123 (0xF0C00)
CONFIG3~1~125=0xff,0x7c,Page 124 (0xF1000)
CONFIG3~1~126=0xff,0x7d,Page 125 (0xF1400)
CONFIG3~1~127=0xff,0x7e,Page 126 (0xF1800)
CONFIG3~1~128=0xff,0x7f,Page 127 (0xF1C00)
CONFIG3~1~129=0xff,0x80,Page 128 (0xF2000)
CONFIG3~1~130=0xff,0x81,Page 129 (0xF2400)
CONFIG3~1~131=0xff,0x82,Page 130 (0xF2800)
CONFIG3~1~132=0xff,0x83,Page 131 (0xF2C00)
CONFIG3~1~133=0xff,0x84,Page 132 (0xF3000)
CONFIG3~1~134=0xff,0x85,Page 133 (0xF3400)
CONFIG3~1~135=0xff,0x86,Page 134 (0xF3800)
CONFIG3~1~136=0xff,0x87,Page 135 (0xF3C00)
CONFIG3~1~137=0xff,0x88,Page 136 (0xF4000)
CONFIG3~1~138=0xff,0x89,Page 137 (0xF4400)
CONFIG3~1~139=0xff,0x8a,Page 138 (0xF4800)
CONFIG3~1~140=0xff,0x8b,Page 139 (0xF5000)
CONFIG3~1~141=0xff,0x8c,Page 140 (0xF5400)
CONFIG3~1~142=0xff,0x8d,Page 141 (0xF5800)
CONFIG3~1~143=0xff,0x8e,Page 142 (0xF5C00)
CONFIG3~1~144=0xff,0x8f,Page 143 (0xF6000)
CONFIG3~1~145=0xff,0x90,Page 144 (0xF6400)
CONFIG3~1~146=0xff,0x91,Page 145 (0xF6800)
CONFIG3~1~147=0xff,0x92,Page 146 (0xF6C00)
CONFIG3~1~148=0xff,0x93,Page 147 (0xF7000)
CONFIG3~1~149=0xff,0x94,Page 148 (0xF7400)
CONFIG3~1~150=0xff,0x95,Page 149 (0xF7800)
CONFIG3~1~151=0xff,0x96,Page 150 (0xF7C00)
CONFIG3~1~152=0xff,0x97,Page 151 (0xF8000)
CONFIG3~1~153=0xff,0x98,Page 152 (0xF8400)
CONFIG3~1~154=0xff,0x99,Page 153 (0xF8800)
CONFIG3~1~155=0xff,0x9a,Page 154 (0xF8C00)
CONFIG3~1~156=0xff,0x9b,Page 155 (0xF9000)
CONFIG3~1~157=0xff,0x9c,Page 156 (0xF9400)
CONFIG3~1~158=0xff,0x9d,Page 157 (0xF9800)
CONFIG3~1~159=0xff,0x9e,Page 158 (0xF9C00)
CONFIG3~1~160=0xff,0x9f,Page 159 (0xFA000)
CONFIG3~1~161=0xff,0xa0,Page 160 (0xFA400)
CONFIG3~1~162=0xff,0xa1,Page 161 (0xFA800)
CONFIG3~1~163=0xff,0xa2,Page 162 (0xFAC00)
CONFIG3~1~164=0xff,0xa3,Page 163 (0xFB000)
CONFIG3~1~165=0xff,0xa4,Page 164 (0xFB400)
CONFIG3~1~166=0xff,0xa5,Page 165 (0xFB800)
CONFIG3~1~167=0xff,0xa6,Page 166 (0xFBC00)
CONFIG3~1~168=0xff,0xa7,Page 167 (0xFC000)
CONFIG3~1~169=0xff,0xa8,Page 168 (0xFC400)
CONFIG3~1~170=0xff,0xa9,Page 169 (0xFC800)
CONFIG3~1~171=0xff,0xaa,Page 170 (0xFCC00)
CONFIG3~1~172=0xff,0xab,Page 171 (0xFD000)
CONFIG3~1~173=0xff,0xac,Page 172 (0xFD400)
CONFIG3~1~174=0xff,0xad,Page 173 (0xFD800)
CONFIG3~1~175=0xff,0xae,Page 174 (0xFE000)
CONFIG3~1~176=0xff,0xaf,Page 175 (0xFE400)
CONFIG3~1~177=0xff,0xb0,Page 176 (0xFE800)
CONFIG3~1~178=0xff,0xb1,Page 177 (0xFEC00)
CONFIG3~1~179=0xff,0xb2,Page 178 (0xFF000)
CONFIG3~1~180=0xff,0xb3,Page 179 (0xFF400)
CONFIG3~1~181=0xff,0xb4,Page 180 (0xFF800)
CONFIG3~1~182=0xff,0xb5,Page 181 (0xFFC00)
CONFIG3~1~183=0xff,0xb6,Page 182 (0x100000)
CONFIG3~1~184=0xff,0xb7,Page 183 (0x100400)
CONFIG3~1~185=0xff,0xb8,Page 184 (0x100800)
CONFIG3~1~186=0xff,0xb9,Page 185 (0x100C00)
CONFIG3~1~187=0xff,0xba,Page 186 (0x101000)
CONFIG3~1~188=0xff,0xbb,Page 187 (0x101400)
CONFIG3~1~189=0xff,0xbc,Page 188 (0x101800)
CONFIG3~1~190=0xff,0xbd,Page 189 (0x101C00)
CONFIG3~1~191=0xff,0xbe,Page 190 (0x102000)
CONFIG3~1~192=0xff,0xbf,Page 191 (0x102400)
CONFIG3~1~193=0xff,0xc0,Page 192 (0x102800)
CONFIG3~1~194=0xff,0xc1,Page 193 (0x102C00)
CONFIG3~1~195=0xff,0xc2,Page 194 (0x103000)
CONFIG3~1~196=0xff,0xc3,Page 195 (0x103400)
CONFIG3~1~197=0xff,0xc4,Page 196 (0x103800)
CONFIG3~1~198=0xff,0xc5,Page 197 (0x103C00)
CONFIG3~1~199=0xff,0xc6,Page 198 (0x104000)
CONFIG3~1~200=0xff,0xc7,Page 199 (0x104400)
CONFIG3~1~201=0xff,0xc8,Page 200 (0x104800)
CONFIG3~1~202=0xff,0xc9,Page 201 (0x104C00)
CONFIG3~1~203=0xff,0xca,Page 202 (0x105000)
CONFIG3~1~204=0xff,0xcb,Page 203 (0x105400)
CONFIG3~1~205=0xff,0xcc,Page 204 (0x105800)
CONFIG3~1~206=0xff,0xcd,Page 205 (0x105C00)
CONFIG3~1~207=0xff,0xce,Page 206 (0x106000)
CONFIG3~1~208=0xff,0xcf,Page 207 (0x106400)
CONFIG3~1~209=0xff,0xd0,Page 208 (0x106800)
CONFIG3~1~210=0xff,0xd1,Page 209 (0x106C00)
CONFIG3~1~211=0xff,0xd2,Page 210 (0x107000)
CONFIG3~1~212=0xff,0xd3,Page 211 (0x107400)
CONFIG3~1~213=0xff,0xd4,Page 212 (0x107800)
CONFIG3~1~214=0xff,0xd5,Page 213 (0x107C00)
CONFIG3~1~215=0xff,0xd6,Page 214 (0x108000)
CONFIG3~1~216=0xff,0xd7,Page 215 (0x108400)
CONFIG3~1~217=0xff,0xd8,Page 216 (0x108800)
CONFIG3~1~218=0xff,0xd9,Page 217 (0x108C00)
CONFIG3~1~219=0xff,0xda,Page 218 (0x109000)
CONFIG3~1~220=0xff,0xdb,Page 219 (0x109400)
CONFIG3~1~221=0xff,0xdc,Page 220 (0x109800)
CONFIG3~1~222=0xff,0xdd,Page 221 (0x109C00)
CONFIG3~1~223=0xff,0xde,Page 222 (0x10A000)
CONFIG3~1~224=0xff,0xdf,Page 223 (0x10A400)
CONFIG3~1~225=0xff,0xe0,Page 224 (0x10A800)
CONFIG3~1~226=0xff,0xe1,Page 225 (0x10AC00)
CONFIG3~1~227=0xff,0xe2,Page 226 (0x10B000)
CONFIG3~1~228=0xff,0xe3,Page 227 (0x10B400)
CONFIG3~1~229=0xff,0xe4,Page 228 (0x10B800)
CONFIG3~1~230=0xff,0xe5,Page 229 (0x10BC00)
CONFIG3~1~231=0xff,0xe6,Page 230 (0x10C000)
CONFIG3~1~232=0xff,0xe7,Page 231 (0x10C400)
CONFIG3~1~233=0xff,0xe8,Page 232 (0x10C800)
CONFIG3~1~234=0xff,0xe9,Page 233 (0x10CC400)
CONFIG3~1~235=0xff,0xea,Page 234 (0x10D000)
CONFIG3~1~236=0xff,0xeb,Page 235 (0x10D400)
CONFIG3~1~237=0xff,0xec,Page 236 (0x10D800)
CONFIG3~1~238=0xff,0xed,Page 237 (0x10DC00)
CONFIG3~1~239=0xff,0xee,Page 238 (0x10E000)
CONFIG3~1~240=0xff,0xef,Page 239 (0x10E400)
CONFIG3~1~241=0xff,0xf0,Page 240 (0x10E800)
CONFIG3~1~242=0xff,0xf1,Page 241 (0x10EC00)
CONFIG3~1~243=0xff,0xf2,Page 242 (0x10F000)
CONFIG3~1~244=0xff,0xf3,Page 243 (0x10F400)
CONFIG3~1~245=0xff,0xf4,Page 244 (0x10F800)
CONFIG3~1~246=0xff,0xf5,Page 245 (0x10FC00)
CONFIG3~1~247=0xff,0xf6,Page 246 (0x110000)
CONFIG3~1~248=0xff,0xf7,Page 247 (0x110400)
CONFIG3~1~249=0xff,0xf8,Page 248 (0x110800)
CONFIG3~1~250=0xff,0xf9,Page 249 (0x110C00)
CONFIG3~1~251=0xff,0xfa,Page 250 (0x111000)
CONFIG3~1~252=0xff,0xfb,Page 251 (0x111400)
CONFIG3~1~253=0xff,0xfc,Page 252 (0x111800)
CONFIG3~1~254=0xff,0xfd,Page 253 (0x111C00)
CONFIG3~1~255=0xff,0xfe,Page 254 (0x112000)
CONFIG3~1~256=0xff,0xff,Page 255 (0x112400)

CONFIG3~2~1=0x300,0x300,Default (high gain) Mode
CONFIG3~2~2=0x300,0x100,Low-Power (low gain) Mode
CONFIG3~2~3=0x300,0x0,External Clock Mode (SCLKI)

CONFIG3~3~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~3~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~4~1=0x1000,0x1000,PMP in pin-compatible mode
CONFIG3~4~2=0x1000,0x0,PMP pins in alternate location mode

CONFIG3~5~1=0x2000,0x2000,Disabled
CONFIG3~5~2=0x2000,0x0,Enabled

CONFIG3~6~1=0x4000,0x4000,Disabled
CONFIG3~6~2=0x4000,0x0,Enabled

CONFIG3~7~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~7~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~3=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~4=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~5=FNOSC,0x700,Initial Oscillator Select
CONFIG2~6=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~7=PLLDIV,0x7000,96 MHz PLL Prescaler Select
CONFIG2~8=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x10,0x10,Enabled
CONFIG2~2~2=0x10,0x0,Disabled

CONFIG2~3~1=0x20,0x0,Enabled
CONFIG2~3~2=0x20,0x20,Disabled

CONFIG2~4~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~5~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~5~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~6~1=0x800,0x0,Enabled
CONFIG2~6~2=0x800,0x800,Disabled

CONFIG2~7~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~7~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~7~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~7~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~7~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~7~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~7~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~7~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~8~1=0x8000,0x0,Disabled
CONFIG2~8~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=ALTVREF,0x20,Alternate VREF location Enable
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=COE,0x400,Clip-on Emulation mode
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x0,AVREF and CVREF are in alternate locations
CONFIG1~3~2=0x20,0x20,AVREF and CVREF are in default locations

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Disabled
CONFIG1~7~2=0x400,0x0,Enabled

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ32GA002]

pgmmem=0x0
~pgmmem=0x57fb
cfgmem=0x57fc
~cfgmem=0x57ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4450000

configslots=4
0x57fc=LASTWORD
0x57fd=
0x57fe=LASTWORDMINUSONE
0x57ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ32GA004]

pgmmem=0x0
~pgmmem=0x57fb
cfgmem=0x57fc
~cfgmem=0x57ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x44d0000

configslots=4
0x57fc=LASTWORD
0x57fd=
0x57fe=LASTWORDMINUSONE
0x57ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ32GA102]

pgmmem=0x0
~pgmmem=0x57f7
cfgmem=0x57f8
~cfgmem=0x57ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x42020000

configslots=8
0x57f8=CONFIG4
0x57f9=
0x57fa=CONFIG3
0x57fb=
0x57fc=CONFIG2
0x57fd=
0x57fe=CONFIG1
0x57ff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x3f,Highest Page (same as page 21)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES2,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=RES1,0x7800,Reserved
CONFIG2~9=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x7800,0x7800,Reserved

CONFIG2~9~1=0x8000,0x0,Disabled
CONFIG2~9~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ32GA104]

pgmmem=0x0
~pgmmem=0x57f7
cfgmem=0x57f8
~cfgmem=0x57ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420a0000

configslots=8
0x57f8=CONFIG4
0x57f9=
0x57fa=CONFIG3
0x57fb=
0x57fc=CONFIG2
0x57fd=
0x57fe=CONFIG1
0x57ff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x3f,Highest Page (same as page 21)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES2,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=RES1,0x7800,Reserved
CONFIG2~9=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x7800,0x7800,Reserved

CONFIG2~9~1=0x8000,0x0,Disabled
CONFIG2~9~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000, WriteGeneral Segment Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ32GB002]

pgmmem=0x0
~pgmmem=0x57f7
cfgmem=0x57f8
~cfgmem=0x57ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x42030000

configslots=8
0x57f8=CONFIG4
0x57f9=
0x57fa=CONFIG3
0x57fb=
0x57fc=CONFIG2
0x57fd=
0x57fe=CONFIG1
0x57ff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x3f,Highest Page (same as page 21)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES1,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select
CONFIG2~10=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x800,0x800,Enabled
CONFIG2~8~2=0x800,0x0,Disabled

CONFIG2~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~9~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~10~1=0x8000,0x0,Disabled
CONFIG2~10~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ32GB004]

pgmmem=0x0
~pgmmem=0x57f7
cfgmem=0x57f8
~cfgmem=0x57ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420b0000

configslots=8
0x57f8=CONFIG4
0x57f9=
0x57fa=CONFIG3
0x57fb=
0x57fc=CONFIG2
0x57fd=
0x57fe=CONFIG1
0x57ff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x3f,Highest Page (same as page 21)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES1,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select
CONFIG2~10=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x800,0x800,Enabled
CONFIG2~8~2=0x800,0x0,Disabled

CONFIG2~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~9~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~10~1=0x8000,0x0,Disabled
CONFIG2~10~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ48GA002]

pgmmem=0x0
~pgmmem=0x83fb
cfgmem=0x83fc
~cfgmem=0x83ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4460000

configslots=4
0x83fc=LASTWORD
0x83fd=
0x83fe=LASTWORDMINUSONE
0x83ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ48GA004]

pgmmem=0x0
~pgmmem=0x83fb
cfgmem=0x83fc
~cfgmem=0x83ff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x44e0000

configslots=4
0x83fc=LASTWORD
0x83fd=
0x83fe=LASTWORDMINUSONE
0x83ff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA002]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4470000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA004]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x44f0000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C1SEL,0x4,I2C1 Pin Location Select
LASTWORDMINUSONE~3=RES0,0x8,Reserved
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK Protection
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=SOSCSEL,0x1800,Sec Oscillator Select
LASTWORDMINUSONE~9=WUPTSEL,0x6000,Wake-up timer Select
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Primary SCL1/SDA1 Pins
LASTWORDMINUSONE~2~2=0x4,0x0,Secondary SCL1/SDA1 Pins

LASTWORDMINUSONE~3~1=0x8,0x8,Reserved

LASTWORDMINUSONE~4~1=0x10,0x0,IOLOCK may be changed via unlocking seq
LASTWORDMINUSONE~4~2=0x10,0x10,Once IOLOCK is set, cannot be changed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x1800,0x1800,Default Secondary Oscillator (SOSC)
LASTWORDMINUSONE~8~2=0x1800,0x800,Low Power Secondary Oscillator (LPSOSC)

LASTWORDMINUSONE~9~1=0x6000,0x6000,Legacy Wake-up Timer
LASTWORDMINUSONE~9~2=0x6000,0x2000,Fast Wake-up Timer

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x300,EMUC1/EMUD1 shared with PGC1/PGD1
LASTWORD~6~2=0x300,0x200,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~3=0x300,0x100,EMUC3/EMUD3 shared with PCG3/PGD3

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA006]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4050000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA008]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4080000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA010]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x40b0000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA102]

pgmmem=0x0
~pgmmem=0xabf7
cfgmem=0xabf8
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x42060000

configslots=8
0xabf8=CONFIG4
0xabf9=
0xabfa=CONFIG3
0xabfb=
0xabfc=CONFIG2
0xabfd=
0xabfe=CONFIG1
0xabff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x16,Page 22 (0x5800)
CONFIG3~1~24=0x3f,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0x3f,0x18,Page 24 (0x6000)
CONFIG3~1~26=0x3f,0x19,Page 25 (0x6400)
CONFIG3~1~27=0x3f,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0x3f,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0x3f,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0x3f,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0x3f,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0x3f,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0x3f,0x20,Page 32 (0x8000)
CONFIG3~1~34=0x3f,0x21,Page 33 (0x8400)
CONFIG3~1~35=0x3f,0x22,Page 34 (0x8800)
CONFIG3~1~36=0x3f,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0x3f,0x24,Page 36 (0x9000)
CONFIG3~1~38=0x3f,0x25,Page 37 (0x9400)
CONFIG3~1~39=0x3f,0x26,Page 38 (0x9800)
CONFIG3~1~40=0x3f,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0x3f,0x28,Page 40 (0xA000)
CONFIG3~1~42=0x3f,0x29,Page 41 (0xA400)
CONFIG3~1~43=0x3f,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0x3f,0x3f,Highest Page (same as page 42)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES2,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=RES1,0x7800,Reserved
CONFIG2~9=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x7800,0x7800,Reserved

CONFIG2~9~1=0x8000,0x0,Disabled
CONFIG2~9~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA104]

pgmmem=0x0
~pgmmem=0xabf7
cfgmem=0xabf8
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420e0000

configslots=8
0xabf8=CONFIG4
0xabf9=
0xabfa=CONFIG3
0xabfb=
0xabfc=CONFIG2
0xabfd=
0xabfe=CONFIG1
0xabff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x16,Page 22 (0x5800)
CONFIG3~1~24=0x3f,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0x3f,0x18,Page 24 (0x6000)
CONFIG3~1~26=0x3f,0x19,Page 25 (0x6400)
CONFIG3~1~27=0x3f,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0x3f,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0x3f,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0x3f,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0x3f,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0x3f,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0x3f,0x20,Page 32 (0x8000)
CONFIG3~1~34=0x3f,0x21,Page 33 (0x8400)
CONFIG3~1~35=0x3f,0x22,Page 34 (0x8800)
CONFIG3~1~36=0x3f,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0x3f,0x24,Page 36 (0x9000)
CONFIG3~1~38=0x3f,0x25,Page 37 (0x9400)
CONFIG3~1~39=0x3f,0x26,Page 38 (0x9800)
CONFIG3~1~40=0x3f,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0x3f,0x28,Page 40 (0xA000)
CONFIG3~1~42=0x3f,0x29,Page 41 (0xA400)
CONFIG3~1~43=0x3f,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0x3f,0x3f,Highest Page (same as page 42)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES2,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=RES1,0x7800,Reserved
CONFIG2~9=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x7800,0x7800,Reserved

CONFIG2~9~1=0x8000,0x0,Disabled
CONFIG2~9~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA106]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xFFFF0000
id=0x10000000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA108]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xFFFF0000
id=0x10020000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GA110]

pgmmem=0x0
~pgmmem=0xabfb
cfgmem=0xabfc
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xFFFF0000
id=0x10060000

configslots=4
0xabfc=LASTWORD
0xabfd=
0xabfe=LASTWORDMINUSONE
0xabff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GB002]

pgmmem=0x0
~pgmmem=0xabf7
cfgmem=0xabf8
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x42070000

configslots=8
0xabf8=CONFIG4
0xabf9=
0xabfa=CONFIG3
0xabfb=
0xabfc=CONFIG2
0xabfd=
0xabfe=CONFIG1
0xabff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x16,Page 22 (0x5800)
CONFIG3~1~24=0x3f,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0x3f,0x18,Page 24 (0x6000)
CONFIG3~1~26=0x3f,0x19,Page 25 (0x6400)
CONFIG3~1~27=0x3f,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0x3f,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0x3f,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0x3f,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0x3f,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0x3f,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0x3f,0x20,Page 32 (0x8000)
CONFIG3~1~34=0x3f,0x21,Page 33 (0x8400)
CONFIG3~1~35=0x3f,0x22,Page 34 (0x8800)
CONFIG3~1~36=0x3f,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0x3f,0x24,Page 36 (0x9000)
CONFIG3~1~38=0x3f,0x25,Page 37 (0x9400)
CONFIG3~1~39=0x3f,0x26,Page 38 (0x9800)
CONFIG3~1~40=0x3f,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0x3f,0x28,Page 40 (0xA000)
CONFIG3~1~42=0x3f,0x29,Page 41 (0xA400)
CONFIG3~1~43=0x3f,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0x3f,0x3f,Highest Page (same as page 42)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES1,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select
CONFIG2~10=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x800,0x800,Enabled
CONFIG2~8~2=0x800,0x0,Disabled

CONFIG2~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~9~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~10~1=0x8000,0x0,Disabled
CONFIG2~10~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GB004]

pgmmem=0x0
~pgmmem=0xabf7
cfgmem=0xabf8
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x420f0000

configslots=8
0xabf8=CONFIG4
0xabf9=
0xabfa=CONFIG3
0xabfb=
0xabfc=CONFIG2
0xabfd=
0xabfe=CONFIG1
0xabff=

CONFIG4_unused=0x0
CONFIG4~1=DSWDTPS,0xf,DSWDT Postscale Select
CONFIG4~2=DSWCKSEL,0x10,Deep Sleep Watchdog Timer Oscillator Select
CONFIG4~3=RTCCKSEL,0x20,RTCC Reference Oscillator  Select
CONFIG4~4=DSBOREN,0x40,Deep Sleep BOR
CONFIG4~5=DSWDTEN,0x80,Deep Sleep Watchdog Timer
CONFIG4~6=RES1,0xff00,Reserved

CONFIG4~1~1=0xf,0xf,1:2,147,483,648 (25.7 days)
CONFIG4~1~2=0xf,0xe,1:536,870,912 (6.4 days)
CONFIG4~1~3=0xf,0xd,1:134,217,728 (38.5 hours)
CONFIG4~1~4=0xf,0xc,1:33,554,432 (9.6 hours)
CONFIG4~1~5=0xf,0xb,1:8,388,608 (2.4 hours)
CONFIG4~1~6=0xf,0xa,1:2,097,152 (36 minutes)
CONFIG4~1~7=0xf,0x9,1:524,288 (9 minutes)
CONFIG4~1~8=0xf,0x8,1:131,072 (135 seconds)
CONFIG4~1~9=0xf,0x7,1:32,768 (34 seconds)
CONFIG4~1~10=0xf,0x6,1:8,192 (8.5 seconds)
CONFIG4~1~11=0xf,0x5,1:2,048 (2.1 seconds)
CONFIG4~1~12=0xf,0x4,1:512 (528 ms)
CONFIG4~1~13=0xf,0x3,1:128 (132 ms)
CONFIG4~1~14=0xf,0x2,1:32 (33 ms)
CONFIG4~1~15=0xf,0x1,1:8 (8.3 ms)
CONFIG4~1~16=0xf,0x0,1:2 (2.1 ms)

CONFIG4~2~1=0x10,0x10,Low Power RC Oscillator (LPRC)
CONFIG4~2~2=0x10,0x0,Secondary Oscillator (SOSC)

CONFIG4~3~1=0x20,0x20,Secondary Oscillator (SOSC)
CONFIG4~3~2=0x20,0x0,Low Power RC Oscillator (LPRC)

CONFIG4~4~1=0x40,0x40,Enabled
CONFIG4~4~2=0x40,0x0,Disabled

CONFIG4~5~1=0x80,0x80,Enabled
CONFIG4~5~2=0x80,0x0,Disabled

CONFIG4~6~1=0xff00,0xff00,Reserved

CONFIG3_unused=0x0
CONFIG3~1=WPFP,0x3f,Write Protection Flash Page Segment Boundary
CONFIG3~2=RES2,0xc0,Reserved
CONFIG3~3=SOSCSEL,0x300,Secondary Oscillator Pin Mode Select
CONFIG3~4=WUTSEL,0xc00,Voltage Regulator Wake-up Time Select
CONFIG3~5=RES1,0x1000,Reserved
CONFIG3~6=WPDIS,0x2000,Segment Write Protection Disable
CONFIG3~7=WPCFG,0x4000,Write Protect Configuration Page Select
CONFIG3~8=WPEND,0x8000,Segment Write Protection End Page Select

CONFIG3~1~1=0x3f,0x0,Page 0 (0x0)
CONFIG3~1~2=0x3f,0x1,Page 1 (0x400)
CONFIG3~1~3=0x3f,0x2,Page 2 (0x800)
CONFIG3~1~4=0x3f,0x3,Page 3 (0xC00)
CONFIG3~1~5=0x3f,0x4,Page 4 (0x1000)
CONFIG3~1~6=0x3f,0x5,Page 5 (0x1400)
CONFIG3~1~7=0x3f,0x6,Page 6 (0x1800)
CONFIG3~1~8=0x3f,0x7,Page 7 (0x1C00)
CONFIG3~1~9=0x3f,0x8,Page 8 (0x2000)
CONFIG3~1~10=0x3f,0x9,Page 9 (0x2400)
CONFIG3~1~11=0x3f,0xa,Page 10 (0x2800)
CONFIG3~1~12=0x3f,0xb,Page 11 (0x2C00)
CONFIG3~1~13=0x3f,0xc,Page 12 (0x3000)
CONFIG3~1~14=0x3f,0xd,Page 13 (0x3400)
CONFIG3~1~15=0x3f,0xe,Page 14 (0x3800)
CONFIG3~1~16=0x3f,0xf,Page 15 (0x3C00)
CONFIG3~1~17=0x3f,0x10,Page 16 (0x4000)
CONFIG3~1~18=0x3f,0x11,Page 17 (0x4400)
CONFIG3~1~19=0x3f,0x12,Page 18 (0x4800)
CONFIG3~1~20=0x3f,0x13,Page 19 (0x4C00)
CONFIG3~1~21=0x3f,0x14,Page 20 (0x5000)
CONFIG3~1~22=0x3f,0x15,Page 21 (0x5400)
CONFIG3~1~23=0x3f,0x16,Page 22 (0x5800)
CONFIG3~1~24=0x3f,0x17,Page 23 (0x5C00)
CONFIG3~1~25=0x3f,0x18,Page 24 (0x6000)
CONFIG3~1~26=0x3f,0x19,Page 25 (0x6400)
CONFIG3~1~27=0x3f,0x1a,Page 26 (0x6800)
CONFIG3~1~28=0x3f,0x1b,Page 27 (0x6C00)
CONFIG3~1~29=0x3f,0x1c,Page 28 (0x7000)
CONFIG3~1~30=0x3f,0x1d,Page 29 (0x7400)
CONFIG3~1~31=0x3f,0x1e,Page 30 (0x7800)
CONFIG3~1~32=0x3f,0x1f,Page 31 (0x7C00)
CONFIG3~1~33=0x3f,0x20,Page 32 (0x8000)
CONFIG3~1~34=0x3f,0x21,Page 33 (0x8400)
CONFIG3~1~35=0x3f,0x22,Page 34 (0x8800)
CONFIG3~1~36=0x3f,0x23,Page 35 (0x8C00)
CONFIG3~1~37=0x3f,0x24,Page 36 (0x9000)
CONFIG3~1~38=0x3f,0x25,Page 37 (0x9400)
CONFIG3~1~39=0x3f,0x26,Page 38 (0x9800)
CONFIG3~1~40=0x3f,0x27,Page 39 (0x9C00)
CONFIG3~1~41=0x3f,0x28,Page 40 (0xA000)
CONFIG3~1~42=0x3f,0x29,Page 41 (0xA400)
CONFIG3~1~43=0x3f,0x2a,Page 42 (0xA800)
CONFIG3~1~44=0x3f,0x3f,Highest Page (same as page 42)

CONFIG3~2~1=0xc0,0xc0,Reserved

CONFIG3~3~1=0x300,0x300,SOSC pins in Default (high drive-strength) Oscillator Mode
CONFIG3~3~2=0x300,0x100,SOSC pins in Low-Power (low drive-strength) Oscillator Mode
CONFIG3~3~3=0x300,0x0,SOSC pins have digital I/O functions (RA4, RB4)

CONFIG3~4~1=0xc00,0xc00,Legacy Wake-up Timer
CONFIG3~4~2=0xc00,0x400,Fast Wake-up Timer

CONFIG3~5~1=0x1000,0x1000,Reserved

CONFIG3~6~1=0x2000,0x2000,Disabled
CONFIG3~6~2=0x2000,0x0,Enabled

CONFIG3~7~1=0x4000,0x4000,Disabled
CONFIG3~7~2=0x4000,0x0,Enabled

CONFIG3~8~1=0x8000,0x8000,Write Protect from WPFP to the last page of memory
CONFIG3~8~2=0x8000,0x0,Write Protect from page 0 to WPFP

CONFIG2_unused=0x0
CONFIG2~1=POSCMOD,0x3,Primary Oscillator Select
CONFIG2~2=I2C1SEL,0x4,I2C1 Pin Select bit
CONFIG2~3=RES1,0x8,Reserved
CONFIG2~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable
CONFIG2~5=OSCIOFNC,0x20,OSCO Pin Configuration
CONFIG2~6=FCKSM,0xc0,Clock Switching and Fail-Safe Clock Monitor
CONFIG2~7=FNOSC,0x700,Initial Oscillator Select
CONFIG2~8=PLL96MHZ,0x800,96MHz PLL Startup Select
CONFIG2~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select
CONFIG2~10=IESO,0x8000,Internal External Switchover

CONFIG2~1~1=0x3,0x3,Primary Oscillator Disabled
CONFIG2~1~2=0x3,0x2,HS Oscillator Enabled
CONFIG2~1~3=0x3,0x1,XT Oscillator Enabled
CONFIG2~1~4=0x3,0x0,External-Clock Mode Enabled

CONFIG2~2~1=0x4,0x4,Use SCL1/SDA1 pins for I2C1
CONFIG2~2~2=0x4,0x0,Use ASCL1/ASDA1 pins for I2C1

CONFIG2~3~1=0x8,0x8,Reserved

CONFIG2~4~1=0x10,0x10,Enabled
CONFIG2~4~2=0x10,0x0,Disabled

CONFIG2~5~1=0x20,0x0,Enabled
CONFIG2~5~2=0x20,0x20,Disabled

CONFIG2~6~1=0x80,0x80,Sw Disabled, Mon Disabled
CONFIG2~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
CONFIG2~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

CONFIG2~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
CONFIG2~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
CONFIG2~7~3=0x700,0x400,Secondary Oscillator (SOSC)
CONFIG2~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
CONFIG2~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
CONFIG2~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
CONFIG2~7~7=0x700,0x0,Fast RC Oscillator (FRC)

CONFIG2~8~1=0x800,0x800,Enabled
CONFIG2~8~2=0x800,0x0,Disabled

CONFIG2~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
CONFIG2~9~2=0x7000,0x6000,Oscillator input divided by 8 (32 MHz input)
CONFIG2~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
CONFIG2~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
CONFIG2~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
CONFIG2~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
CONFIG2~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
CONFIG2~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

CONFIG2~10~1=0x8000,0x0,Disabled
CONFIG2~10~2=0x8000,0x8000,Enabled

CONFIG1_unused=0x0
CONFIG1~1=WDTPS,0xf,Watchdog Timer Postscaler
CONFIG1~2=FWPSA,0x10,WDT Prescaler
CONFIG1~3=RES2,0x20,Reserved
CONFIG1~4=WINDIS,0x40,Windowed WDT
CONFIG1~5=FWDTEN,0x80,Watchdog Timer
CONFIG1~6=ICS,0x300,Emulator Pin Placement Select bits
CONFIG1~7=RES1,0x400,Reserved
CONFIG1~8=BKBUG,0x800,Background Debugger
CONFIG1~9=GWRP,0x1000,General Segment Write Protect
CONFIG1~10=GCP,0x2000,General Segment Code Protect
CONFIG1~11=JTAGEN,0x4000,JTAG Port Enable
CONFIG1~12=SIGN,0x8000,Signature Bit

CONFIG1~1~1=0xf,0xf,1:32,768
CONFIG1~1~2=0xf,0xe,1:16,384
CONFIG1~1~3=0xf,0xd,1:8,192
CONFIG1~1~4=0xf,0xc,1:4,096
CONFIG1~1~5=0xf,0xb,1:2,048
CONFIG1~1~6=0xf,0xa,1:1,024
CONFIG1~1~7=0xf,0x9,1:512
CONFIG1~1~8=0xf,0x8,1:256
CONFIG1~1~9=0xf,0x7,1:128
CONFIG1~1~10=0xf,0x6,1:64
CONFIG1~1~11=0xf,0x5,1:32
CONFIG1~1~12=0xf,0x4,1:16
CONFIG1~1~13=0xf,0x3,1:8
CONFIG1~1~14=0xf,0x2,1:4
CONFIG1~1~15=0xf,0x1,1:2
CONFIG1~1~16=0xf,0x0,1:1

CONFIG1~2~1=0x10,0x10,1:128
CONFIG1~2~2=0x10,0x0,1:32

CONFIG1~3~1=0x20,0x20,Reserved

CONFIG1~4~1=0x40,0x40,Disabled
CONFIG1~4~2=0x40,0x0,Enabled

CONFIG1~5~1=0x80,0x80,Enabled
CONFIG1~5~2=0x80,0x0,Disabled

CONFIG1~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
CONFIG1~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
CONFIG1~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

CONFIG1~7~1=0x400,0x400,Reserved

CONFIG1~8~1=0x800,0x800,Disabled
CONFIG1~8~2=0x800,0x0,Enabled

CONFIG1~9~1=0x1000,0x1000,Disabled
CONFIG1~9~2=0x1000,0x0,Enabled

CONFIG1~10~1=0x2000,0x2000,Disabled
CONFIG1~10~2=0x2000,0x0,Enabled

CONFIG1~11~1=0x4000,0x4000,Enabled
CONFIG1~11~2=0x4000,0x0,Disabled

CONFIG1~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GB106]

pgmmem=0x0
~pgmmem=0xabf7
cfgmem=0xabf8
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10010000

configslots=8
0xabf8=
0xabf9=
0xabfa=LASTWORDMINUSTWO
0xabfb=
0xabfc=LASTWORDMINUSONE
0xabfd=
0xabfe=LASTWORD
0xabff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GB108]

pgmmem=0x0
~pgmmem=0xabf7
cfgmem=0xabf8
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10030000

configslots=8
0xabf8=
0xabf9=
0xabfa=LASTWORDMINUSTWO
0xabfb=
0xabfc=LASTWORDMINUSONE
0xabfd=
0xabfe=LASTWORD
0xabff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ64GB110]

pgmmem=0x0
~pgmmem=0xabf7
cfgmem=0xabf8
~cfgmem=0xabff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x10070000

configslots=8
0xabf8=
0xabf9=
0xabfa=LASTWORDMINUSTWO
0xabfb=
0xabfc=LASTWORDMINUSONE
0xabfd=
0xabfe=LASTWORD
0xabff=

LASTWORDMINUSTWO_unused=0x0
LASTWORDMINUSTWO~1=WPFP0,0x1,Protected Code Segment Boundary Page bit0
LASTWORDMINUSTWO~2=WPFP1,0x2,Protected Code Segment Boundary Page bit1
LASTWORDMINUSTWO~3=WPFP2,0x4,Protected Code Segment Boundary Page bit2
LASTWORDMINUSTWO~4=WPFP3,0x8,Protected Code Segment Boundary Page bit3
LASTWORDMINUSTWO~5=WPFP4,0x10,Protected Code Segment Boundary Page bit4
LASTWORDMINUSTWO~6=WPFP5,0x20,Protected Code Segment Boundary Page bit5
LASTWORDMINUSTWO~7=WPFP6,0x40,Protected Code Segment Boundary Page bit6
LASTWORDMINUSTWO~8=WPFP7,0x80,Protected Code Segment Boundary Page bit7
LASTWORDMINUSTWO~9=WPFP8,0x100,Protected Code Segment Boundary Page bit8
LASTWORDMINUSTWO~10=RES1,0x1e00,Reserved
LASTWORDMINUSTWO~11=WPDIS,0x2000,Segment Write Protection Disable bit
LASTWORDMINUSTWO~12=WPCFG,0x4000,Configuration Word Code Page Protection Selectbit
LASTWORDMINUSTWO~13=WPEND,0x8000,Segment Write Protection End Page Select bit

LASTWORDMINUSTWO~1~1=0x1,0x1,Set
LASTWORDMINUSTWO~1~2=0x1,0x0,Cleared

LASTWORDMINUSTWO~2~1=0x2,0x2,Set
LASTWORDMINUSTWO~2~2=0x2,0x0,Cleared

LASTWORDMINUSTWO~3~1=0x4,0x4,Set
LASTWORDMINUSTWO~3~2=0x4,0x0,Cleared

LASTWORDMINUSTWO~4~1=0x8,0x8,Set
LASTWORDMINUSTWO~4~2=0x8,0x0,Cleared

LASTWORDMINUSTWO~5~1=0x10,0x10,Set
LASTWORDMINUSTWO~5~2=0x10,0x0,Cleared

LASTWORDMINUSTWO~6~1=0x20,0x20,Set
LASTWORDMINUSTWO~6~2=0x20,0x0,Cleared

LASTWORDMINUSTWO~7~1=0x40,0x40,Set
LASTWORDMINUSTWO~7~2=0x40,0x0,Cleared

LASTWORDMINUSTWO~8~1=0x80,0x80,Set
LASTWORDMINUSTWO~8~2=0x80,0x0,Cleared

LASTWORDMINUSTWO~9~1=0x100,0x100,Set
LASTWORDMINUSTWO~9~2=0x100,0x0,Cleared

LASTWORDMINUSTWO~10~1=0x1e00,0x1e00,Reserved

LASTWORDMINUSTWO~11~1=0x2000,0x2000,Segmented code protection disabled
LASTWORDMINUSTWO~11~2=0x2000,0x0,Segmented code prot enabled; prot seg defined by WPEND, WPCFG & WPFP

LASTWORDMINUSTWO~12~1=0x4000,0x4000,Last page (at the top of program memory) and Flash Configuration Words are not protected
LASTWORDMINUSTWO~12~2=0x4000,0x0,Last page and Flash Configuration Words are code protected

LASTWORDMINUSTWO~13~1=0x8000,0x8000,Protected code segment upper boundary is at the last page of program memory
LASTWORDMINUSTWO~13~2=0x8000,0x0,Protected code segment lower boundary is at the bottom of program memory

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=I2C2SEL,0x4,I2C2 Pin Select bit
LASTWORDMINUSONE~3=DISUVREG,0x8,Internal USB 3.3V Regulator Disable bit
LASTWORDMINUSONE~4=IOL1WAY,0x10,IOLOCK One-Way Set Enable bit
LASTWORDMINUSONE~5=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~6=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~7=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~8=PLL96DIS,0x800,96MHz PLL Disable
LASTWORDMINUSONE~9=PLLDIV,0x7000,USB 96 MHz PLL Prescaler Select bits
LASTWORDMINUSONE~10=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x4,0x4,Use SCL2/SDA2 pins for I2C2
LASTWORDMINUSONE~2~2=0x4,0x0,Use ASCL2/ASDA2 pins for I2C2

LASTWORDMINUSONE~3~1=0x8,0x8,Regulator is disabled
LASTWORDMINUSONE~3~2=0x8,0x0,Regulator is enabled

LASTWORDMINUSONE~4~1=0x10,0x0,The IOLOCK bit can be set and cleared , provided the unlock sequence has been completed
LASTWORDMINUSONE~4~2=0x10,0x10,The IOLOCK bit can be set once, provided the unlock sequence has been completed

LASTWORDMINUSONE~5~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~5~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~6~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~6~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~6~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~7~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~7~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~7~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~7~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~7~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~7~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~7~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~8~1=0x800,0x0,96MHz PLL Enabled

LASTWORDMINUSONE~9~1=0x7000,0x7000,Oscillator input divided by 12 (48 MHz input)
LASTWORDMINUSONE~9~2=0x7000,0x6000,Oscillator input divided by 10 (40 MHz input)
LASTWORDMINUSONE~9~3=0x7000,0x5000,Oscillator input divided by 6 (24 MHz input)
LASTWORDMINUSONE~9~4=0x7000,0x4000,Oscillator input divided by 5 (20 MHz input)
LASTWORDMINUSONE~9~5=0x7000,0x3000,Oscillator input divided by 4 (16 MHz input)
LASTWORDMINUSONE~9~6=0x7000,0x2000,Oscillator input divided by 3 (12 MHz input)
LASTWORDMINUSONE~9~7=0x7000,0x1000,Oscillator input divided by 2 (8 MHz input)
LASTWORDMINUSONE~9~8=0x7000,0x0,Oscillator input used directly (4 MHz input)

LASTWORDMINUSONE~10~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~10~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES0,0x20,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x300,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GCP,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x20,0x20,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x300,0x100,Emulator functions are shared with PGEC3/PGED3
LASTWORD~6~2=0x300,0x200,Emulator functions are shared with PGEC2/PGED2
LASTWORD~6~3=0x300,0x300,Emulator functions are shared with PGEC1/PGED1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ96GA006]

pgmmem=0x0
~pgmmem=0xfffb
cfgmem=0xfffc
~cfgmem=0xffff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4060000

configslots=4
0xfffc=LASTWORD
0xfffd=
0xfffe=LASTWORDMINUSONE
0xffff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ96GA008]

pgmmem=0x0
~pgmmem=0xfffb
cfgmem=0xfffc
~cfgmem=0xffff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x4090000

configslots=4
0xfffc=LASTWORD
0xfffd=
0xfffe=LASTWORDMINUSONE
0xffff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA


[PIC24FJ96GA010]

pgmmem=0x0
~pgmmem=0xfffb
cfgmem=0xfffc
~cfgmem=0xffff
userid=
~userid=
eedata=
~eedata=
devid=0xff0000
~devid=0xff0003
idmask=0xffff0000
id=0x40c0000

configslots=4
0xfffc=LASTWORD
0xfffd=
0xfffe=LASTWORDMINUSONE
0xffff=

LASTWORDMINUSONE_unused=0x0
LASTWORDMINUSONE~1=POSCMOD,0x3,Primary Oscillator Select
LASTWORDMINUSONE~2=RES0,0x781c,Reserved
LASTWORDMINUSONE~3=OSCIOFNC,0x20,Primary Oscillator Output Function
LASTWORDMINUSONE~4=FCKSM,0xc0,Clock Switching and Monitor
LASTWORDMINUSONE~5=FNOSC,0x700,Oscillator Select
LASTWORDMINUSONE~6=IESO,0x8000,Internal External Switch Over Mode

LASTWORDMINUSONE~1~1=0x3,0x3,Primary Oscillator Disabled
LASTWORDMINUSONE~1~2=0x3,0x2,HS Oscillator Enabled
LASTWORDMINUSONE~1~3=0x3,0x1,XT Oscillator Enabled
LASTWORDMINUSONE~1~4=0x3,0x0,External-Clock Mode Enabled

LASTWORDMINUSONE~2~1=0x781c,0x781c,Reserved

LASTWORDMINUSONE~3~1=0x20,0x0,OSCO pin has digital I/O function
LASTWORDMINUSONE~3~2=0x20,0x20,OSCO pin has clock out function

LASTWORDMINUSONE~4~1=0x80,0x80,Sw Disabled, Mon Disabled
LASTWORDMINUSONE~4~2=0xc0,0x40,Sw Enabled, Mon Disabled
LASTWORDMINUSONE~4~3=0xc0,0x0,Sw Enabled, Mon Enabled

LASTWORDMINUSONE~5~1=0x700,0x700,Fast RC Oscillator with Postscaler (FRCDIV)
LASTWORDMINUSONE~5~2=0x700,0x500,Low-Power RC Oscillator (LPRC)
LASTWORDMINUSONE~5~3=0x700,0x400,Secondary Oscillator (SOSC)
LASTWORDMINUSONE~5~4=0x700,0x300,Primary Oscillator with PLL module (HSPLL, ECPLL)
LASTWORDMINUSONE~5~5=0x700,0x200,Primary Oscillator (XT, HS, EC)
LASTWORDMINUSONE~5~6=0x700,0x100,Fast RC Oscillator with PLL module (FRCPLL)
LASTWORDMINUSONE~5~7=0x700,0x0,Fast RC Oscillator (FRC)

LASTWORDMINUSONE~6~1=0x8000,0x0,Disabled
LASTWORDMINUSONE~6~2=0x8000,0x8000,Enabled

LASTWORD_unused=0x0
LASTWORD~1=WDTPS,0xf,Watchdog Timer Postscaler
LASTWORD~2=FWPSA,0x10,WDT Prescaler
LASTWORD~3=RES1,0x220,Reserved
LASTWORD~4=WINDIS,0x40,Watchdog Timer Window
LASTWORD~5=FWDTEN,0x80,Watchdog Timer Enable
LASTWORD~6=ICS,0x100,Comm Channel Select
LASTWORD~7=COE,0x400,Set Clip On Emulation Mode
LASTWORD~8=BACKBUG,0x800,Background Debug
LASTWORD~9=GWRP,0x1000,General Code Segment Write Protect
LASTWORD~10=GSS,0x2000,General Code Segment Code Protect
LASTWORD~11=JTAGEN,0x4000,JTAG Port Enable
LASTWORD~12=SIGN,0x8000,Signature Bit

LASTWORD~1~1=0xf,0xf,1:32,768
LASTWORD~1~2=0xf,0xe,1:16,384
LASTWORD~1~3=0xf,0xd,1:8,192
LASTWORD~1~4=0xf,0xc,1:4,096
LASTWORD~1~5=0xf,0xb,1:2,048
LASTWORD~1~6=0xf,0xa,1:1,024
LASTWORD~1~7=0xf,0x9,1:512
LASTWORD~1~8=0xf,0x8,1:256
LASTWORD~1~9=0xf,0x7,1:128
LASTWORD~1~10=0xf,0x6,1:64
LASTWORD~1~11=0xf,0x5,1:32
LASTWORD~1~12=0xf,0x4,1:16
LASTWORD~1~13=0xf,0x3,1:8
LASTWORD~1~14=0xf,0x2,1:4
LASTWORD~1~15=0xf,0x1,1:2
LASTWORD~1~16=0xf,0x0,1:1

LASTWORD~2~1=0x10,0x10,1:128
LASTWORD~2~2=0x10,0x0,1:32

LASTWORD~3~1=0x220,0x220,Reserved

LASTWORD~4~1=0x40,0x40,Non-Window mode
LASTWORD~4~2=0x40,0x0,Window mode

LASTWORD~5~1=0x80,0x80,Enable
LASTWORD~5~2=0x80,0x0,Disable

LASTWORD~6~1=0x100,0x100,EMUC2/EMUD2 shared with PCG2/PGD2
LASTWORD~6~2=0x100,0x0,EMUC1/EMUD1 shared with PCG1/PGD1

LASTWORD~7~1=0x400,0x400,Reset Into Operational Mode
LASTWORD~7~2=0x400,0x0,Reset Into Clip On Emulation Mode

LASTWORD~8~1=0x800,0x800,Disabled
LASTWORD~8~2=0x800,0x0,Enabled

LASTWORD~9~1=0x1000,0x1000,Disabled
LASTWORD~9~2=0x1000,0x0,Enabled

LASTWORD~10~1=0x2000,0x2000,Disabled
LASTWORD~10~2=0x2000,0x0,Enabled

LASTWORD~11~1=0x4000,0x4000,Enabled
LASTWORD~11~2=0x4000,0x0,Disabled

LASTWORD~12~1=0x8000,0x0,Correct

erase=18F_ERASE
prog=18F_PROG
config=18F_CONFIG
data=18F_DATA