V6 Config question

[GTF]

I noticed that the ASM file compiled from V6 appears to contain config data at the end of the file.
e.g.
ORG 0x00300000 (start of config memory)
DW 0x32E7
DW 0xFEFF
DW 0xFFFF
DW 0xFFF3
DW 0xBFFC
DW 0x9FFF
DW 0xBFFF
END

Will this affect the config data already written by a bootloader which will then be used to load the Flowcode program?

[kersing]

That depends on the bootloader. Most bootloaders will not allow setting configuration data as it might render the bootloader unusable. Which bootloader are you using?
BTW. If a bootloader provides the configuration settings your program should be configured to use at least the same clock speed and watchdog settings for it to work as expected.

[GTF]

It is the Diolan USB bootloader modified for the 18F14K50. http://www.diolan.com/pic/bootloader.html
edit: I do have WRTC = ON in the bootloader code.

These settings are included in the ASM file whether or not I check "Write config on download" in project options. edit: I have not seen this with V5. With V5 they are only included if "Configure the chip" is ticked off.
I also noticed that the last config settings are not saved when V6 is closed as they are with V5.

I am using a 12 MHz resonator with 4 x PLL enabled and no clock divide. Clock speed in project options is 48000000.

[JonnyW]

Hi. The config always being added issue looks like an omission in the code generation (a Flowcode bug). I will get that sorted.

Cheers,

Jonny

[GTF]

Thanks Jonny.

The CFGS bit of EECON1 is cleared by the BL during flash writes, so only flash program memory should be written? But the flash write goes to 100% even with the config lines in the code, with no errors reported. Should this be the case? Or is the CFGS bit irrelevant when a config address is specified? (ORG 0x00300000)

Code: Select all

; write flash (if EECON1.FREE is set will perform block erase)          
flash_write  ;modified
   bsf	 EECON1, EEPGD	; Access code memory (not EEPROM)
   bcf	EECON1, CFGS	; Access code memory (not Config)
	bsf	EECON1, WREN	; Enable write
	movlw	0x55
	movwf	EECON2
	movlw	0xAA
	movwf	EECON2
	bsf	EECON1, WR	; Start flash/eeprom writing
   return