Difference between revisions of "Component: IO Expander (BL0155) (E-blocks 2)"

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==Component Source Code==
 
==Component Source Code==
  
Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/FC_Comp_Source_temp/EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_temp/EBlocks2_IOEXP_BL0155.fcfx]
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Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx]
  
Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/FC_Comp_Source_temp/EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_temp/EBlocks2_IOEXP_BL0155.fcfx]
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Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx]
  
 
==Detailed description==
 
==Detailed description==
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''<span style="color:red;">No additional examples</span>''
 
''<span style="color:red;">No additional examples</span>''
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| width="90%" style="border-top: 2px solid #000;" | ''Return''
 
| width="90%" style="border-top: 2px solid #000;" | ''Return''
 
|}
 
|}
 
 
  
  
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|-
 
|-
 
| colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.&nbsp;
 
| colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.&nbsp;
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|-
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| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
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| width="90%" | MOSI Remap Pin
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|-
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| colspan="2" | Select which the target pin to assign the MOSI hardware pin functionality.&nbsp;
 
|-
 
|-
 
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
 
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
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|-
 
|-
 
| colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.&nbsp;
 
| colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.&nbsp;
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|-
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| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
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| width="90%" | MISO Remap Pin
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|-
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| colspan="2" | Select which the target pin to assign the MISO hardware pin functionality.&nbsp;
 
|-
 
|-
 
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
 
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
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|-
 
|-
 
| colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master.&nbsp;
 
| colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master.&nbsp;
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|-
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| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
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| width="90%" | CLK Remap Pin
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|-
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| colspan="2" | Select which the target pin to assign the CLK hardware pin functionality.&nbsp;
 
|-
 
|-
 
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
 
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
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| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation
 
| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation
 
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|-
|-
 
| width="10%" align="center" | [[File:Fc9-type-10-icon.png]]
 
| width="90%" | Label
 
|-
 
| colspan="2" | &nbsp;
 
 
|-
 
|-
 
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
 
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
| width="90%" | Show Comms Flasher
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| width="90%" | Simulate Comms
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| colspan="2" | &nbsp;
 
|-
 
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
 
| width="90%" | Scope Traces
 
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| colspan="2" | Selects if the scope traces are automatically generated or not&nbsp;
 
|-
 
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
 
| width="90%" | Console Data
 
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| colspan="2" | Selects if the console data is automatically generated or not&nbsp;
 
|-
 
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
 
| width="90%" | API
 
 
|-
 
|-
 
| colspan="2" | &nbsp;
 
| colspan="2" | &nbsp;
 
|}
 
|}

Latest revision as of 10:26, 20 October 2023

Author Matrix TSL
Version 1.0
Category E-blocks 2


IO Expander component

Provides 16 digital input/output pins arranged into two 8-bit E-block 2 ports using a SPI bus connection.

Component Source Code

Please click here to download the component source project: FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx

Please click here to view the component source code (Beta): FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx

Detailed description

No detailed description exists yet for this component

Examples

No additional examples








Macro reference

ConfigureInversion

Fc9-comp-macro.png ConfigureInversion
Configures the pin inversion for the two ports. Disabled on all pins by default. 
Fc9-u8-icon.png - BYTE PortA
Port A inversion sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
Fc9-u8-icon.png - BYTE PortB
Port B inversion sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
Fc9-void-icon.png - VOID Return


ConfigurePullups

Fc9-comp-macro.png ConfigurePullups
Configures the pullups for the two ports. Disabled on all pins by default. 
Fc9-u8-icon.png - BYTE PortA
Port A pull ups sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
Fc9-u8-icon.png - BYTE PortB
Port B pull ups sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
Fc9-void-icon.png - VOID Return


Initialise

Fc9-comp-macro.png Initialise
 
Fc9-void-icon.png - VOID Return


ReadPort

Fc9-comp-macro.png ReadPort
Reads a value to one of the ports with a mask. Configures the masked bits to be inputs before reading the input value. 
Fc9-u8-icon.png - BYTE Port
0=PortA, 1=PortB 
Fc9-u8-icon.png - BYTE Mask
Allows port bits to be modified without effecting other bits, 255 = write full port. 
Fc9-u8-icon.png - BYTE Return


ReadPortPin

Fc9-comp-macro.png ReadPortPin
Reads a single port pin from one of the ports. Configures the pins to be an input before reading the input value. Returns 0 or 1 corresponding to the value on the port pin. 
Fc9-u8-icon.png - BYTE Port
0=PortA, 1=PortB 
Fc9-u8-icon.png - BYTE Pin
Port pin to read. Range: 0-7 
Fc9-u8-icon.png - BYTE Return


ReadRegister

Fc9-comp-macro.png ReadRegister
Reads an 8-bit value from a register on the I/O expander device. 
Fc9-u8-icon.png - BYTE Address
Register address to write to. Range: 0-15 
Fc9-u8-icon.png - BYTE Return


WritePort

Fc9-comp-macro.png WritePort
Writes a value to one of the ports with a mask. Configures the masked bits to be outputs before writing the output value. 
Fc9-u8-icon.png - BYTE Port
0=PortA, 1=PortB 
Fc9-u8-icon.png - BYTE Mask
Allows port bits to be modified without effecting other bits, 255 = write full port. 
Fc9-u8-icon.png - BYTE Value
Value to write. Range 0-255 
Fc9-void-icon.png - VOID Return


WritePortPin

Fc9-comp-macro.png WritePortPin
Writes a single port pin on one of the ports. Configures the pins to be an output before writing the input value.  
Fc9-u8-icon.png - BYTE Port
0=PortA, 1=PortB 
Fc9-u8-icon.png - BYTE Pin
Port pin to read. Range: 0-7 
Fc9-u8-icon.png - BYTE Value
Value to output on the selected pin. Range: 0-1 
Fc9-void-icon.png - VOID Return


WriteRegister

Fc9-comp-macro.png WriteRegister
Writes an 8-bit value to a register on the I/O expander device. 
Fc9-u8-icon.png - BYTE Address
Register address to write to. Range: 0-15 
Fc9-u8-icon.png - BYTE Value
Value to write. Range: 0-255 
Fc9-void-icon.png - VOID Return


Property reference

Fc9-prop-icon.png Properties
Fc9-conn-icon.png SPI Communications
Fc9-type-16-icon.png External Address
Selects the value of the three address pins for the MCP23S17. 
Fc9-type-16-icon.png Channel
SPI Channel selector 
Fc9-type-16-icon.png Prescale
Prescale option selector 
Fc9-type-5-icon.png MOSI
SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. 
Fc9-type-16-icon.png MOSI Remap Pin
Select which the target pin to assign the MOSI hardware pin functionality. 
Fc9-type-5-icon.png MISO
SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. 
Fc9-type-16-icon.png MISO Remap Pin
Select which the target pin to assign the MISO hardware pin functionality. 
Fc9-type-5-icon.png CLK
SPI Clock Pin CLK - The Clock signal is driven by the SPI master. 
Fc9-type-16-icon.png CLK Remap Pin
Select which the target pin to assign the CLK hardware pin functionality. 
Fc9-type-5-icon.png CS / SS
Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device.  
Fc9-type-5-icon.png Reset Pin
 
Fc9-conn-icon.png Simulation
Fc9-type-7-icon.png Simulate Comms