Difference between revisions of "Component: IO Expander (BL0155) (E-blocks 2)"
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| ==Component Source Code== | ==Component Source Code== | ||
| − | Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/ | + | Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx] | 
| − | Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/ | + | Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx] | 
| ==Detailed description== | ==Detailed description== | ||
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| ''<span style="color:red;">No additional examples</span>'' | ''<span style="color:red;">No additional examples</span>'' | ||
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| | colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.  | | colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.  | ||
| + | |- | ||
| + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | ||
| + | | width="90%" | MOSI Remap Pin | ||
| + | |- | ||
| + | | colspan="2" | Select which the target pin to assign the MOSI hardware pin functionality.  | ||
| |- | |- | ||
| | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | ||
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| | colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.  | | colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.  | ||
| + | |- | ||
| + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | ||
| + | | width="90%" | MISO Remap Pin | ||
| + | |- | ||
| + | | colspan="2" | Select which the target pin to assign the MISO hardware pin functionality.  | ||
| |- | |- | ||
| | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | ||
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| | colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master.  | | colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master.  | ||
| + | |- | ||
| + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | ||
| + | | width="90%" | CLK Remap Pin | ||
| + | |- | ||
| + | | colspan="2" | Select which the target pin to assign the CLK hardware pin functionality.  | ||
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| | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | ||
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| | width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation | | width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation | ||
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| | width="10%" align="center" | [[File:Fc9-type-7-icon.png]] | | width="10%" align="center" | [[File:Fc9-type-7-icon.png]] | ||
| − | | width="90%" |  | + | | width="90%" | Simulate Comms | 
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| | colspan="2" |   | | colspan="2" |   | ||
| |} | |} | ||
Latest revision as of 10:26, 20 October 2023
| Author | Matrix TSL | 
| Version | 1.0 | 
| Category | E-blocks 2 | 
Contents
IO Expander component
Provides 16 digital input/output pins arranged into two 8-bit E-block 2 ports using a SPI bus connection.
Component Source Code
Please click here to download the component source project: FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx
Please click here to view the component source code (Beta): FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx
Detailed description
No detailed description exists yet for this component
Examples
No additional examples
Macro reference
ConfigureInversion
ConfigurePullups
Initialise
|   | Initialise | 
|  - VOID | Return | 
ReadPort
ReadPortPin
ReadRegister
|   | ReadRegister | 
| Reads an 8-bit value from a register on the I/O expander device. | |
|  - BYTE | Address | 
| Register address to write to. Range: 0-15 | |
|  - BYTE | Return | 
WritePort
WritePortPin
WriteRegister
|   | WriteRegister | 
| Writes an 8-bit value to a register on the I/O expander device. | |
|  - BYTE | Address | 
| Register address to write to. Range: 0-15 | |
|  - BYTE | Value | 
| Value to write. Range: 0-255 | |
|  - VOID | Return | 





