Component: DAC Dual (MCP49x2) (Analog Output): Difference between revisions

Latest revision as of 14:37, 13 July 2026

Author	Matrix TSL
Version	1.0
Category	Analog Output

DAC Dual (MCP49x2) component

Component to drive a dual digital to analogue converter (DAC) IC from Microchip via an SPI interface. Compatible with MCP4902 (8-Bit), MCP4912 (10-Bit) and MCP4922 (12-Bit) devices.

Component Source Code

Please click here to download the component source project: FC_Comp_Source_DAC_MCP49x2.fcfx

Please click here to view the component source code (Beta): FC_Comp_Source_DAC_MCP49x2.fcfx

Detailed description

No detailed description exists yet for this component

Examples

No additional examples

Macro reference

ControlPins

	ControlPins
Allows Shutdown (SHDN) and Latch (LDAC) pins to be controlled directly if enabled.
- BOOL	Shutdown
0 = Shutdown Device, 1 = Device Active
- BOOL	Latch
0 = Data output driven from DAC register, 1 = Data output locked
- VOID	Return

Disable

	Disable
Disables the DAC output.
- BYTE	Channel
0=DAC Channel 0 , 1=DAC Channel 1
- VOID	Return

Enable

	Enable
Enables the DAC Output.
- BYTE	Channel
0=DAC Channel 0 , 1=DAC Channel 1
- VOID	Return

Initialise

	Initialise
Configures the SPI peripheral ready for communications and initialises the internal variables. DAC needs to be enabled before any output voltage can be generated.
- VOID	Return

SetOutput

	SetOutput
Sets the output voltage of the DAC 8-Bit: Range 0-255 10-Bit: Range 0-1023 12-Bit: Range 0-4095
- BYTE	Channel
0=DAC Channel 0 , 1=DAC Channel 1
- UINT	DAC_Value
The value to output to the DAC
- VOID	Return

Property reference

	Properties
	DAC IC
Selects which DAC IC is connected and therefore the bit depth available.
	Gain Option
Selects the maximum reference value for the DAC
	Vref Pin Voltage
The reference voltage applied to the VREF pin.
	Vref Voltage
Reference Voltage, Used to calculate the Voltage resolution.
	Steps
Number of discrete output states available from the DAC.
	Control Bits
Number of digital control bits
	Resolution
Maximum output resolution based on number of control bits.
	Voltage Resolution
Specifies the Resolution per digital bit in terms of Voltage.
	SPI Connections
	Channel
SPI Channel selector
	Prescale
Prescale option selector
	MOSI
SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.
	MOSI Remap Pin
Select which the target pin to assign the MOSI hardware pin functionality.
	MISO
SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.
	MISO Remap Pin
Select which the target pin to assign the MISO hardware pin functionality.
	CLK
SPI Clock Pin CLK - The Clock signal is driven by the SPI master.
	CLK Remap Pin
Select which the target pin to assign the CLK hardware pin functionality.
	CS / SS
Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device.
	Use SHDN Pin
Allows the SHDN pin to be driven from an output pin on the microcontroller. If not used then tie the SHDN pin to VCC to allow the DAC to function.
	Use LDAC Pin
Allows the LDAC pin to be driven from an output pin on the microcontroller. If not used then tie the LDAC pin to GND to allow the DAC to function.
	Simulation
	Simulate Comms

@@ Line 12: / Line 12: @@
-==DAC Dual component==
+==DAC Dual (MCP49x2) component==
 Component to drive a dual digital to analogue converter (DAC) IC from Microchip via an SPI interface. Compatible with MCP4902 (8-Bit), MCP4912 (10-Bit) and MCP4922 (12-Bit) devices.
 ==Component Source Code==
-Please click here for the component source code: [https://www.flowcode.co.uk/wikicopy/componentsource/FC_Comp_Source_DAC_MCP49x2.fcfx FC_Comp_Source_DAC_MCP49x2.fcfx]
+Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/FC_Comp_Source_DAC_MCP49x2.fcfx FC_Comp_Source_DAC_MCP49x2.fcfx]
+Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/FC_Comp_Source_DAC_MCP49x2.fcfx FC_Comp_Source_DAC_MCP49x2.fcfx]
 ==Detailed description==
@@ Line 34: / Line 48: @@
 ==Examples==
@@ Line 49: / Line 75: @@
-==Downloadable macro reference==
-{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
-|-
-| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''SetOutput'''
-|-
-| colspan="2" | Sets the output voltage of the DAC 8-Bit: Range 0-255 10-Bit: Range 0-1023 12-Bit: Range 0-4095&nbsp;
-|-
-|-
-| width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE
-| width="90%" | Channel
-|-
-| colspan="2" | 0=DAC Channel 0 , 1=DAC Channel 1&nbsp;
-|-
-| width="10%" align="center" | [[File:Fc9-u16-icon.png]] - UINT
-| width="90%" | DAC_Value
-|-
-| colspan="2" | The value to output to the DAC&nbsp;
-|-
-| width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID
-| width="90%" style="border-top: 2px solid #000;" | ''Return''
-|}
-{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
+==Macro reference==
+===ControlPins===
+{| class="mtx-class-macrotable wikitable"
 |-
-| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
+| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ControlPins'''
+| width="90%" class="mtx-class-macrohead" | '''ControlPins'''
 |-
 | colspan="2" | Allows Shutdown (SHDN) and Latch (LDAC) pins to be controlled directly if enabled.&nbsp;
@@ Line 97: / Line 111: @@
-{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
+===Disable===
+{| class="mtx-class-macrotable wikitable"
 |-
-| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
+| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Disable'''
+| width="90%" class="mtx-class-macrohead" | '''Disable'''
 |-
 | colspan="2" | Disables the DAC output.&nbsp;
@@ Line 115: / Line 130: @@
-{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
+===Enable===
+{| class="mtx-class-macrotable wikitable"
 |-
-| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
+| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Enable'''
+| width="90%" class="mtx-class-macrohead" | '''Enable'''
 |-
 | colspan="2" | Enables the DAC Output.&nbsp;
@@ Line 133: / Line 149: @@
-{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
+===Initialise===
+{| class="mtx-class-macrotable wikitable"
 |-
-| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
+| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Initialise'''
+| width="90%" class="mtx-class-macrohead" | '''Initialise'''
 |-
 | colspan="2" | Configures the SPI peripheral ready for communications and initialises the internal variables. DAC needs to be enabled before any output voltage can be generated.&nbsp;
@@ Line 146: / Line 163: @@
+===SetOutput===
+{| class="mtx-class-macrotable wikitable"
+|-
+| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
+| width="90%" class="mtx-class-macrohead" | '''SetOutput'''
+|-
+| colspan="2" | Sets the output voltage of the DAC 8-Bit: Range 0-255 10-Bit: Range 0-1023 12-Bit: Range 0-4095&nbsp;
+|-
+|-
+| width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE
+| width="90%" | Channel
+|-
+| colspan="2" | 0=DAC Channel 0 , 1=DAC Channel 1&nbsp;
+|-
+| width="10%" align="center" | [[File:Fc9-u16-icon.png]] - UINT
+| width="90%" | DAC_Value
+|-
+| colspan="2" | The value to output to the DAC&nbsp;
+|-
+| width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID
+| width="90%" style="border-top: 2px solid #000;" | ''Return''
+|}
 ==Property reference==
-{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
+{| class="mtx-class-macrotable wikitable"
 |-
-| width="10%" align="center" style="background-color:#D8C9D8;" | [[File:Fc9-prop-icon.png]]
+| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-prop-icon.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Properties'''
+| width="90%" class="mtx-class-macrohead" | '''Properties'''
 |-
 |-
@@ Line 196: / Line 235: @@
 | colspan="2" | Specifies the Resolution per digital bit in terms of Voltage.&nbsp;
 |-
-| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]]
+| width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]]
-| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | SPI Connections
+| width="90%" class="mtx-class-propfolder" | SPI Connections
 |-
 |-
@@ Line 214: / Line 253: @@
 |-
 | colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.&nbsp;
+|-
+| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
+| width="90%" | MOSI Remap Pin
+|-
+| colspan="2" | Select which the target pin to assign the MOSI hardware pin functionality.&nbsp;
 |-
 | width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
@@ Line 219: / Line 263: @@
 |-
 | colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.&nbsp;
+|-
+| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
+| width="90%" | MISO Remap Pin
+|-
+| colspan="2" | Select which the target pin to assign the MISO hardware pin functionality.&nbsp;
 |-
 | width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
@@ Line 224: / Line 273: @@
 |-
 | colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master.&nbsp;
+|-
+| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
+| width="90%" | CLK Remap Pin
+|-
+| colspan="2" | Select which the target pin to assign the CLK hardware pin functionality.&nbsp;
 |-
 | width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
@@ Line 240: / Line 294: @@
 | colspan="2" | Allows the LDAC pin to be driven from an output pin on the microcontroller. If not used then tie the LDAC pin to GND to allow the DAC to function.&nbsp;
 |-
-| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]]
+| width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]]
-| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation
+| width="90%" class="mtx-class-propfolder" | Simulation
 |-
 |-

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