Component: IO Expander (BL0155) (E-blocks 2): Difference between revisions
Appearance
m Text replacement - "width="10%" align="center" style="background-color:#D8C9D8;"" to "width="10%" align="center" class="mtx-class-macrohead"" |
m Text replacement - "style="background-color:#EAE1EA;"" to "class="mtx-class-propfolder"" |
||
| (2 intermediate revisions by the same user not shown) | |||
| Line 69: | Line 69: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ConfigureInversion''' | ||
|- | |- | ||
| colspan="2" | Configures the pin inversion for the two ports. Disabled on all pins by default. | | colspan="2" | Configures the pin inversion for the two ports. Disabled on all pins by default. | ||
| Line 93: | Line 93: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ConfigurePullups''' | ||
|- | |- | ||
| colspan="2" | Configures the pullups for the two ports. Disabled on all pins by default. | | colspan="2" | Configures the pullups for the two ports. Disabled on all pins by default. | ||
| Line 117: | Line 117: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''Initialise''' | ||
|- | |- | ||
| colspan="2" | | | colspan="2" | | ||
| Line 131: | Line 131: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ReadPort''' | ||
|- | |- | ||
| colspan="2" | Reads a value to one of the ports with a mask. Configures the masked bits to be inputs before reading the input value. | | colspan="2" | Reads a value to one of the ports with a mask. Configures the masked bits to be inputs before reading the input value. | ||
| Line 155: | Line 155: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ReadPortPin''' | ||
|- | |- | ||
| colspan="2" | Reads a single port pin from one of the ports. Configures the pins to be an input before reading the input value. Returns 0 or 1 corresponding to the value on the port pin. | | colspan="2" | Reads a single port pin from one of the ports. Configures the pins to be an input before reading the input value. Returns 0 or 1 corresponding to the value on the port pin. | ||
| Line 179: | Line 179: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ReadRegister''' | ||
|- | |- | ||
| colspan="2" | Reads an 8-bit value from a register on the I/O expander device. | | colspan="2" | Reads an 8-bit value from a register on the I/O expander device. | ||
| Line 198: | Line 198: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''WritePort''' | ||
|- | |- | ||
| colspan="2" | Writes a value to one of the ports with a mask. Configures the masked bits to be outputs before writing the output value. | | colspan="2" | Writes a value to one of the ports with a mask. Configures the masked bits to be outputs before writing the output value. | ||
| Line 227: | Line 227: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''WritePortPin''' | ||
|- | |- | ||
| colspan="2" | Writes a single port pin on one of the ports. Configures the pins to be an output before writing the input value. | | colspan="2" | Writes a single port pin on one of the ports. Configures the pins to be an output before writing the input value. | ||
| Line 256: | Line 256: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''WriteRegister''' | ||
|- | |- | ||
| colspan="2" | Writes an 8-bit value to a register on the I/O expander device. | | colspan="2" | Writes an 8-bit value to a register on the I/O expander device. | ||
| Line 281: | Line 281: | ||
|- | |- | ||
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-prop-icon.png]] | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-prop-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''Properties''' | ||
|- | |- | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-propfolder" | SPI Communications | ||
|- | |- | ||
|- | |- | ||
| Line 343: | Line 343: | ||
| colspan="2" | | | colspan="2" | | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-propfolder" | Simulation | ||
|- | |- | ||
|- | |- | ||
Latest revision as of 14:37, 13 July 2026
| Author | Matrix TSL |
| Version | 1.0 |
| Category | E-blocks 2 |
IO Expander component
Provides 16 digital input/output pins arranged into two 8-bit E-block 2 ports using a SPI bus connection.
Component Source Code
Please click here to download the component source project: FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx
Please click here to view the component source code (Beta): FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx
Detailed description
No detailed description exists yet for this component
Examples
No additional examples
Macro reference
ConfigureInversion
ConfigurePullups
Initialise
| Initialise | |
| Return | |
ReadPort
ReadPortPin
ReadRegister
| ReadRegister | |
| Reads an 8-bit value from a register on the I/O expander device. | |
| Address | |
| Register address to write to. Range: 0-15 | |
| Return | |
WritePort
WritePortPin
WriteRegister
| WriteRegister | |
| Writes an 8-bit value to a register on the I/O expander device. | |
| Address | |
| Register address to write to. Range: 0-15 | |
| Value | |
| Value to write. Range: 0-255 | |
| Return | |