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Component: ADC ADS1256 (Analog Input): Difference between revisions

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| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Initialise'''
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| colspan="2" | Sets up the SPI bus ready for communications with the sensor IC. 
| colspan="2" | Sets up the SPI bus ready for communications with the sensor IC. 
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| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadData'''
| width="90%" class="mtx-class-macrohead" | '''ReadData'''
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| colspan="2" | Reads the result of an ADC conversion as a binary value in the range of 0 to 16,777,215 
| colspan="2" | Reads the result of an ADC conversion as a binary value in the range of 0 to 16,777,215 
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| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadDataAsVoltage'''
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| colspan="2" | Reads the result of an ADC conversion as a floating point voltage 
| colspan="2" | Reads the result of an ADC conversion as a floating point voltage 
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| colspan="2" | Reads from the general purpose IO pins 
| colspan="2" | Reads from the general purpose IO pins 
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| colspan="2" | Configures the positive and negative input channels 
| colspan="2" | Configures the positive and negative input channels 
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| colspan="2" | Writes to the general purpose IO pins 
| colspan="2" | Writes to the general purpose IO pins 
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| colspan="2" | Specified the data rate in samples per second. Based on a clock rate of 7.68MHz and scales linearly with fCLKIN 
| colspan="2" | Specified the data rate in samples per second. Based on a clock rate of 7.68MHz and scales linearly with fCLKIN 
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| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Connections
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| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation
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Latest revision as of 14:37, 13 July 2026

Author Matrix TSL
Version 1.0
Category Analog Input


ADC ADS1256 component

24-bit very low noise single ended or differential ADC compatible with ADS1255 or ADS1256. ADS1255 has two single ended or one differential input. ADC1256 has eight single ended or four differential inputs.

Version information

Library Version, Component Version, Date, Author, Info
7, 1.0, 25-10-24, BR, Minor change to try and address a problem
8, 1.0, 28-10-24, BR, Solved a problem where the sensor didn't init correctly

Detailed description

No detailed description exists yet for this component

Examples

No additional examples

Macro reference

Initialise

Initialise
Sets up the SPI bus ready for communications with the sensor IC. 
- VOID Return


ReadData

ReadData
Reads the result of an ADC conversion as a binary value in the range of 0 to 16,777,215 
- LONG Return


ReadDataAsVoltage

ReadDataAsVoltage
Reads the result of an ADC conversion as a floating point voltage 
- FLOAT Return


ReadIO

ReadIO
Reads from the general purpose IO pins 
- BYTE Mask
Range: 0 (0b0000) to 15 (0b1111) 
- BYTE Return


SetupADC

SetupADC
Configures the positive and negative input channels 
- BYTE PositiveChannel
0=AIN0 - 7=AIN7, 8=AINCOM 
- BYTE NegativeChannel
0=AIN0 - 7=AIN7, 8=AINCOM 
- BYTE Gain
0=1X, 1=2X, 2=4X, 3=8X, 4=16X, 5=32X, 6=64X 
- VOID Return


WriteIO

WriteIO
Writes to the general purpose IO pins 
- BYTE Mask
Range: 0 (0b0000) to 15 (0b1111) 
- BYTE Value
Range: 0 (0b0000) to 15 (0b1111) 
- VOID Return


Property reference

Properties
Type
 
VREF Voltage
Voltage reference used in the calculations for ReadDataAsVoltage 
Data Rate
Specified the data rate in samples per second. Based on a clock rate of 7.68MHz and scales linearly with fCLKIN 
Connections
Channel
SPI Channel selector 
Prescale
Prescale option selector 
MOSI
SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. 
MOSI Remap Pin
Select which the target pin to assign the MOSI hardware pin functionality. 
MISO
SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. 
MISO Remap Pin
Select which the target pin to assign the MISO hardware pin functionality. 
CLK
SPI Clock Pin CLK - The Clock signal is driven by the SPI master. 
CLK Remap Pin
Select which the target pin to assign the CLK hardware pin functionality. 
CS / SS
Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device.  
Data Ready
 
Sync
 
Simulation
Simulate Comms
 

Component Source Code

Please click here to download the component source project: FC_Comp_Source_ExternalADC_ADS1256.fcfx

Please click here to view the component source code (Beta): FC_Comp_Source_ExternalADC_ADS1256.fcfx