Component: ADC (MCP356X) (Analog Input): Difference between revisions

Latest revision as of 14:37, 13 July 2026

Author	MatrixTSL
Version	1.0
Category	Analog Input

ADC (MCP356X) component

An external ADC featuring 2, 4, or 8 channel 24-bit input. Capable of reading each channel independently or in differential mode. Communication using an SPI bus up to 20MHz.

Detailed description

No detailed description exists yet for this component

Examples

No additional examples

Macro reference

Initialise

	Initialise
Confgures the SPI bus ready for communications and initialises the MCP356X device. Returns true if device is responding to commands.
- BOOL	Return

SampleADC

	SampleADC
Performs a single ADC sample and returns the result as a 24-bit value
- BYTE	PositiveChannel
0=CH0 - 7=CH7, 8=GND, 9=VDD, 11=REF+, 12=REF-, 13=TP, 14=TM, 15=VCM
- BYTE	NegativeChannel
0=CH0 - 7=CH7, 8=GND, 9=VDD, 11=REF+, 12=REF-, 13=TP, 14=TM, 15=VCM
- LONG	Return

SetGainCalibration

	SetGainCalibration
Allows the device offset to be entered allowing for accurate readings.
- ULONG	Gain
Default 800000 = Gain of 1X
- VOID	Return

SetOffsetCalibration

	SetOffsetCalibration
Allows the device offset to be entered allowing for accurate readings.
- LONG	Offset

- VOID	Return

Property reference

	Properties
	Device Configuration
	Device Type

	Device Address
These bits are fixed from the manufacturer and by default are 01. Used as Bits 6 and 7 of the command byte. Alternative bits must be requested from the manufacturer.
	Clock Selection

	Sensor Bias Current

	ADC Bias Current

	AMCLK Prescaler

	Oversampling Ratio

	ADC Gain

	IRQ Mode

	Connections
	Channel
SPI Channel selector
	Prescale
Prescale option selector
	MOSI
SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.
	MOSI Remap Pin
Select which the target pin to assign the MOSI hardware pin functionality.
	MISO
SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.
	MISO Remap Pin
Select which the target pin to assign the MISO hardware pin functionality.
	CLK
SPI Clock Pin CLK - The Clock signal is driven by the SPI master.
	CLK Remap Pin
Select which the target pin to assign the CLK hardware pin functionality.
	CS / SS
Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device.
	Use IRQ
No: Use polling of the status register to determine when an ADC sample is complete. Yes: Use the IRQ interrupt pin to determine when an ADC sample is complete.
	Simulation
	Simulate Comms
No: Simulation is done using panel sliders. Yes: Send SPI data via API interface and show real time data using panel sliders.

Component Source Code

Please click here to download the component source project: FC_Comp_Source_ExternalADC_MCP356X.fcfx

Please click here to view the component source code (Beta): FC_Comp_Source_ExternalADC_MCP356X.fcfx

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-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Initialise'''
+| width="90%" class="mtx-class-macrohead" | '''Initialise'''
 |-
 | colspan="2" | Confgures the SPI bus ready for communications and initialises the MCP356X device. Returns true if device is responding to commands.&nbsp;
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-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''SampleADC'''
+| width="90%" class="mtx-class-macrohead" | '''SampleADC'''
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 | colspan="2" | Performs a single ADC sample and returns the result as a 24-bit value&nbsp;
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 | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''SetGainCalibration'''
+| width="90%" class="mtx-class-macrohead" | '''SetGainCalibration'''
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 | colspan="2" | Allows the device offset to be entered allowing for accurate readings.&nbsp;
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 | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''SetOffsetCalibration'''
+| width="90%" class="mtx-class-macrohead" | '''SetOffsetCalibration'''
 |-
 | colspan="2" | Allows the device offset to be entered allowing for accurate readings.&nbsp;
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-| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Properties'''
+| width="90%" class="mtx-class-macrohead" | '''Properties'''
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 |-
-| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]]
+| width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]]
-| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Device Configuration
+| width="90%" class="mtx-class-propfolder" | Device Configuration
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 | colspan="2" | &nbsp;
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-| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]]
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-| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Connections
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 | colspan="2" | No: Use polling of the status register to determine when an ADC sample is complete. Yes: Use the IRQ interrupt pin to determine when an ADC sample is complete.&nbsp;
 |-
-| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]]
+| width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]]
-| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation
+| width="90%" class="mtx-class-propfolder" | Simulation
 |-
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