Component: FTDI (FT800) (FT800) (Misc): Difference between revisions
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| colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | | colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | ||
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| colspan="2" | Define active edge of PCLK | | colspan="2" | Define active edge of PCLK | ||
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Latest revision as of 14:37, 13 July 2026
| Author | MatrixTSL |
| Version | 2.0 |
| Category | Misc |
FTDI (FT800) component
The FT800 provides a powerful feature set in a small package to create dynamic HMI interfaces. The device supports line by line graphics rendering to 1/16 of a pixel on displays with resolution up to 512 x 512 with 262K colours. The chip includes a touch controller for sensing touch feedback from a TFT display with a resistive touch panel as well as a sound synthesizer and audio playback with a PWM output to drive a speaker.
Component Source Code
Please click here to download the component source project: FC_Comp_Source_FTDI-FT800.fcfx
Please click here to view the component source code (Beta): FC_Comp_Source_FTDI-FT800.fcfx
Detailed description
No detailed description exists yet for this component
Examples
No additional examples
Macro reference
CommandWrite
|
CommandWrite |
| Sends FT800 command | |
 - BYTE
|
Command |
 - VOID
|
Return |
IncrementCommandOffset
|
|
IncrementCommandOffset |
| Adds commandSize to the currentOffset. Checks for 4K ring-buffer offset roll-over | |
 - UINT
|
currentOffset |
| graphics processor command list pointer | |
| - BYTE
|
commandSize |
| number of bytes to increment the offset | |
| - UINT
|
Return |
Initialise
|
|
Initialise |
| System initialization routines. Executed once on reset. Returns 0 if device not detected or 1 if device is correctly initialised. | |
| - BYTE
|
Return |
MemRead16
|
|
MemRead16 |
| Reads a single unsigned int from the FT800 internal address space | |
 - ULONG
|
Address |
| - UINT
|
Return |
MemRead32
|
|
MemRead32 |
| Reads a single unsigned long from the FT800 internal address space | |
| - ULONG
|
Address |
| - ULONG
|
Return |
MemRead8
|
|
MemRead8 |
| Reads a single data byte from the FT800 internal address space | |
| - ULONG
|
Address |
| - BYTE
|
Return |
MemWrite16
|
|
MemWrite16 |
| Writes a unsigned int value to the FT800 internal address space | |
| - ULONG
|
Address |
| - UINT
|
Data |
| - VOID
|
Return |
MemWrite32
|
|
MemWrite32 |
| Writes a unsigned long value to the FT800 internal address space | |
| - ULONG
|
Address |
| - ULONG
|
Data |
| - VOID
|
Return |
MemWrite8
|
|
MemWrite8 |
| Writes a byte value to the FT800 internal address space | |
| - ULONG
|
Address |
| - BYTE
|
Data |
| - VOID
|
Return |
Property reference
|
Properties |
|
SPI Properties |
|
Channel |
| SPI Channel selector | |
|
|
Prescale |
| Prescale option selector | |
|
MOSI |
| SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | |
|
|
MISO |
| SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | |
|
|
CLK |
| SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | |
|
|
Pin Connections |
|
|
Power Pin |
|
|
CS Pin |
|
|
Display Properties |
|
Width |
| Active width of LCD display | |
|
|
Height |
| Active height of LCD display | |
|
|
HCycle |
| Total number of clocks per line | |
|
|
HOffset |
| Start of active line | |
|
|
HSync0 |
| Start of horizontal sync pulse | |
|
|
HSync1 |
| End of horizontal sync pulse | |
|
|
VCycle |
| Total number of lines per screen | |
|
|
VOffset |
| Start of active screen | |
|
|
VSync0 |
| Start of vertical sync pulse | |
|
|
VSync1 |
| End of vertical sync pulse | |
|
|
PixelClock |
| Pixel Clock | |
|
|
Swizzle |
| Define RGB output pins | |
|
|
Clock Polarity |
| Define active edge of PCLK | |
|
|
Simulation |
|
Scope Traces |
| Selects if the scope traces are automatically generated or not | |
|
|
Console Data |
| Selects if the console data is automatically generated or not | |
|
|
API |